PIC16F870/871
FIGURE 1-2: PIC16F871 BLOCK DIAGRAM
Device
Program
FLASH
Data Memory
Data
EEPROM
PIC16F871
2K
128 Bytes
64 Bytes
13
8
PORTA
Data Bus
RAM
Program Counter
FLASH
RA0/AN0
RA1/AN1
Program
Memory
RA2/AN2/VREF-
RA3/AN3/VREF+
RA4/T0CKI
RA5/AN4
8 Level Stack
(13-bit)
File
Registers
Program
Bus
14
RAM Addr (1)
PORTB
9
RB0/INT
RB1
RB2
RB3/PGM
RB4
Addr MUX
Instruction reg
Indirect
Addr
7
Direct Addr
8
RB5
FSR reg
RB6/PGC
RB7/PGD
STATUS reg
PORTC
8
RC0/T1OSO/T1CKI
RC1/T1OSI
RC2/CCP1
RC3
RC4
3
MUX
Power-up
Timer
Oscillator
RC5
RC6/TX/CK
RC7/RX/DT
Instruction
Decode &
Control
Start-up Timer
ALU
Power-on
Reset
8
PORTD
Timing
Generation
Watchdog
Timer
W reg
OSC1/CLKIN
OSC2/CLKOUT
Brown-out
Reset
RD7/PSP7:RD0/PSP0
In-Circuit
Debugger
Low-Voltage
Programming
PORTE
RE0/AN5/RD
RE1/AN6/WR
RE2/AN7/CS
MCLR VDD, VSS
Timer0
Timer1
CCP1
Timer2
10-bit A/D
Data EEPROM
Parallel Slave Port
USART
Note 1: Higher order bits are from the STATUS register.
DS30569A-page 6
Preliminary
1999 Microchip Technology Inc.