PIC16F7X7
CALL
Call Subroutine
CLRWDT
Clear Watchdog Timer
Syntax:
[ label ] CALL k
0 ≤ k ≤ 2047
Syntax:
[ label ] CLRWDT
Operands:
Operation:
Operands:
Operation:
None
(PC) + 1 → TOS,
k → PC<10:0>,
(PCLATH<4:3>) → PC<12:11>
00h → WDT
0 → WDT prescaler,
1 → TO
1 → PD
Status Affected: None
Status Affected: TO, PD
Description:
Call subroutine. First, return
address (PC + 1) is pushed onto
the stack. The eleven-bit
immediate address is loaded into
PC bits<10:0>. The upper bits of
the PC are loaded from PCLATH.
CALLis a two-cycle instruction.
Description:
CLRWDTinstruction resets the
Watchdog Timer. It also resets the
prescaler of the WDT. Status bits,
TO and PD, are set.
CLRF
Clear f
COMF
Complement f
Syntax:
[ label ] CLRF
0 ≤ f ≤ 127
f
Syntax:
[ label ] COMF f,d
Operands:
Operation:
Operands:
0 ≤ f ≤ 127
d ∈ [0,1]
00h → (f)
1 → Z
Operation:
(f) → (destination)
Status Affected:
Description:
Z
Status Affected:
Description:
Z
The contents of register ‘f’ are
cleared and the Z bit is set.
The contents of register ‘f’ are
complemented. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
CLRW
Clear W
DECF
Decrement f
Syntax:
[ label ] CLRW
Syntax:
[ label ] DECF f,d
Operands:
Operation:
None
Operands:
0 ≤ f ≤ 127
d ∈ [0,1]
00h → (W)
1 → Z
Operation:
(f) – 1 → (destination)
Status Affected:
Description:
Z
Status Affected:
Description:
Z
W register is cleared. Zero bit (Z)
is set.
Decrement register ‘f’. If ‘d’ is ‘0’,
the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
DS30498C-page 196
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
