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PIC16F767-I/SP 参数 Datasheet PDF下载

PIC16F767-I/SP图片预览
型号: PIC16F767-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚, 8位CMOS闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin, 8-Bit CMOS Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 276 页 / 4898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F7X7  
RLF  
Rotate Left f through Carry  
SLEEP  
Enter Sleep mode  
Syntax:  
[ label ] RLF f,d  
Syntax:  
[ label ] SLEEP  
Operands:  
0 f 127  
d [0,1]  
Operands:  
Operation:  
None  
00h WDT,  
0 WDT prescaler,  
1 TO,  
Operation:  
See description below  
C
Status Affected:  
Description:  
0 PD  
The contents of register ‘f’ are  
Status Affected:  
Description:  
TO, PD  
rotated one bit to the left through the  
Carry flag. If ‘d’ is ‘0’, the result is  
placed in the W register. If ‘d’ is ‘1’,  
the result is stored back in register ‘f’.  
The Power-Down status bit, PD,  
is cleared. Time-out status bit,  
TO, is set. Watchdog Timer and  
its prescaler are cleared.  
C
Register f  
The processor is put into Sleep  
mode with the oscillator stopped.  
RETURN  
Return from Subroutine  
SUBLW  
Subtract W from Literal  
Syntax:  
[ label ] RETURN  
None  
Syntax:  
[ label ] SUBLW k  
0 k 255  
Operands:  
Operation:  
Operands:  
Operation:  
TOS PC  
k – (W) → (W)  
Status Affected: None  
Status Affected: C, DC, Z  
Description:  
Return from subroutine. The stack  
Description:  
The W register is subtracted (2’s  
is POPed and the top of the stack  
(TOS) is loaded into the program  
counter. This is a two-cycle  
instruction.  
complement method) from the  
eight-bit literal ‘k’. The result is  
placed in the W register.  
RRF  
Rotate Right f through Carry  
SUBWF  
Subtract W from f  
Syntax:  
[ label ] RRF f,d  
Syntax:  
[ label ] SUBWF f,d  
Operands:  
0 f 127  
d [0,1]  
Operands:  
0 f 127  
d [0,1]  
Operation:  
See description below  
C
Operation:  
(f) – (W) → (destination)  
Status Affected:  
Description:  
Status Affected: C, DC, Z  
The contents of register ‘f’ are  
rotated one bit to the right through  
the Carry flag. If ‘d’ is ‘0’, the  
result is placed in the W register.  
If ‘d’ is ‘1’, the result is placed  
back in register ‘f’.  
Description: Subtract (2’s complement method)  
W register from register ‘f’. If ‘d’ is  
0’, the result is stored in the W  
register. If ‘d’ is ‘1’, the result is  
stored back in register ‘f’.  
C
Register f  
2004 Microchip Technology Inc.  
DS30498C-page 199  
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