PIC16F7X7
TABLE 15-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Power-on Reset,
Brown-out Reset
MCLR Reset,
WDT Reset
Wake-up via WDT or
Interrupt
Register
TRISA
TRISB
TRISC
TRISD
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TRISE (PIC16F737/767)
TRISE (PIC16F747/777)
---- 1---
0000 1111
---- u---
0000 1111
---- 1---
uuuu uuuu
PIE1
0000 0000
000- 0-00
---- -1qq
-000 1000
--00 0000
1111 1111
0000 0000
0000 0000
0000 -010
0000 0000
0000 0111
000- 0000
---0 1000
xxxx xxxx
0000 0000
--00 0---
xxxx xxxx
xxxx xxxx
--xx xxxx
---- xxxx
1--- ---0
--00 0101
0000 0000
000- 0-00
---- -uuu
-000 1000
--00 0000
1111 1111
0000 0000
0000 0000
0000 -010
0000 0000
0000 0111
000- 0000
---0 1000
uuuu uuuu
0000 0000
--00 0---
uuuu uuuu
uuuu uuuu
--uu uuuu
---- uuuu
1--- ---u
--00 0101
-uuu uuuu
uuu- u-uu
---- -uuu
-uuu uuuu
--uu uuuu
1111 1111
uuuu uuuu
uuuu uuuu
uuuu -u1u
uuuu uuuu
uuuu uuuu
uuu- uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
---- uuuu
1--- ---u
--uu uuuu
PIE2
PCON
OSCCON
OSCTUNE
PR2
SSPADD
SSPSTAT
TXSTA
SPBRG
CMCON
CVRCON
WDTCON
ADRESL
ADCON1
ADCON2
PMDATA
PMADR
PMDATH
PMADRH
PMCON1
LVDCON
Legend: u= unchanged, x= unknown, — = unimplemented bit, read as ‘0’, q= value depends on condition.
Note 1: One or more bits in INTCON, PIR1 and PR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3: See Table 15-3 for Reset value for specific condition.
2004 Microchip Technology Inc.
DS30498C-page 181
MICROCHIP [ MICROCHIP ]
