PIC16F7X7
12.6
A/D Conversions
after the GO/DONE bit has been set and the
ACQT2:ACQT0 bits are cleared. A conversion is
started after the following instruction to allow entry into
Sleep mode before the conversion begins.
after the GO/DONE bit has been set, the
ACQT2:ACQT0 bits are set to ‘010’ and a 4 T
AD
acquisition time is selected before the conversion
starts.
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
conversion
sample.
This
means
the
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
After the A/D conversion is completed or aborted, a
2 T
AD
wait is required before the next acquisition can be
started. After this wait, acquisition on the selected
channel is automatically started.
Note:
The GO/DONE bit should
NOT
be set in
the same instruction that turns on the A/D.
FIGURE 12-3:
A/D CONVERSION T
AD
CYCLES (ACQT<2:0> =
000,
T
ACQ
=
0)
T
CY
- T
AD
T
AD
1 T
AD
2 T
AD
3 T
AD
4 T
AD
5 T
AD
6 T
AD
7 T
AD
8 T
AD
9 T
AD
10 T
AD
11
b4
b1
b0
b6
b7
b2
b9
b8
b3
b5
Conversion starts
Holding capacitor is disconnected from analog input (typically 100 ns)
Set GO/DONE bit
Next Q4: ADRESH/ADRESL is loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
FIGURE 12-4:
A/D CONVERSION T
AD
CYCLES (ACQT<2:0> =
010,
T
ACQ
= 4 T
AD
)
T
ACQT
Cycles
1
2
3
4
1
2
b9
Automatic
Acquisition
Time
3
b8
4
b7
T
AD
Cycles
5
b6
6
b5
7
b4
8
b3
9
b2
10
b1
11
b0
Conversion starts
(Holding capacitor is disconnected)
Set GO/DONE bit
(Holding capacitor continues
acquiring input)
Next Q4: ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is reconnected to analog input.
2004 Microchip Technology Inc.
DS30498C-page 159
MICROCHIP [ MICROCHIP TECHNOLOGY ]
