PIC16F7X7
TABLE 1-3:
Pin Name
PIC16F747 AND PIC16F777 PINOUT DESCRIPTION (CONTINUED)
PDIP
Pin #
QFN
Pin #
TQFP
Pin #
I/O/P
Type
Buffer
Type
Description
PORTD is a bidirectional I/O port or Parallel Slave Port
when interfacing to a microprocessor bus.
RD0/PSP0
RD0
PSP0
RD1/PSP1
RD1
PSP1
RD2/PSP2
RD2
PSP2
RD3/PSP3
RD3
PSP3
RD4/PSP4
RD4
PSP4
RD5/PSP5
RD5
PSP5
RD6/PSP6
RD6
PSP6
RD7/PSP7
RD7
PSP7
RE0/RD/AN5
RE0
RD
AN5
RE1/WR/AN6
RE1
WR
AN6
RE2/CS/AN7
RE2
CS
AN7
V
SS
V
SS
V
DD
V
DD
NC
Legend:
Note 1:
2:
3:
4:
5:
19
38
38
I/O
I/O
ST/TTL
(3)
Digital I/O.
Parallel Slave Port data.
ST/TTL
(3)
I/O
I/O
Digital I/O.
Parallel Slave Port data.
ST/TTL
(3)
I/O
I/O
Digital I/O.
Parallel Slave Port data.
ST/TTL
(3)
I/O
I/O
Digital I/O.
Parallel Slave Port data.
ST/TTL
(3)
I/O
I/O
Digital I/O.
Parallel Slave Port data.
ST/TTL
(3)
I/O
I/O
Digital I/O.
Parallel Slave Port data.
ST/TTL
(3)
I/O
I/O
Digital I/O.
Parallel Slave Port data.
ST/TTL
(3)
I/O
I/O
Digital I/O.
Parallel Slave Port data.
PORTE is a bidirectional I/O port.
ST/TTL
(3)
I/O
I
I
Digital I/O.
Read control for Parallel Slave Port.
Analog input 5.
ST/TTL
(3)
I/O
I
I
Digital I/O.
Write control for Parallel Slave Port.
Analog input 6.
ST/TTL
(3)
I/O
I
I
Digital I/O.
Chip select control for Parallel Slave Port.
Analog input 7.
—
—
—
—
—
Analog ground reference.
Ground reference for logic and I/O pins.
Analog positive supply.
Positive supply for logic and I/O pins.
These pins are not internally connected. These pins
should be left unconnected.
20
39
39
21
40
40
22
41
41
27
2
2
28
3
3
29
4
4
30
5
5
8
25
25
9
26
26
10
27
27
—
12, 31
—
11, 32
—
31
6, 30
8
7, 28
—
6, 29
—
7, 28
P
P
P
P
—
13, 29 12, 13,
33, 34
I = input
O = output
I/O = input/output
P = power
— = Not used
TTL = TTL input
ST = Schmitt Trigger input
This buffer is a Schmitt Trigger input when configured as an external interrupt.
This buffer is a Schmitt Trigger input when used in Serial Programming mode.
This buffer is a Schmitt Trigger input when configured as a general purpose I/O and a TTL input when used in the Parallel
Slave Port mode (for interfacing to a microprocessor bus).
This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.
Pin location of CCP2 is determined by the CCPMX bit in Configuration Word Register 1.
DS30498C-page 14
2004 Microchip Technology Inc.