PIC16F7X7
TABLE 1-3:
PIC16F747 AND PIC16F777 PINOUT DESCRIPTION
PDIP
Pin # Pin #
QFN
TQFP I/O/P
Pin # Type
Buffer
Type
Pin Name
Description
(4)
OSC1/CLKI/RA7
OSC1
13
32
30
ST/CMOS
Oscillator crystal or external clock input.
I
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode; otherwise
CMOS.
CLKI
RA7
I
External clock source input. Always associated with
pin function OSC1 (see OSC1/CLKI, OSC2/CLKO
pins).
I/O
ST
—
Bidirectional I/O pin.
OSC2/CLKO/RA6
OSC2
14
33
18
31
Oscillator crystal or clock output.
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
In RC mode, OSC2 pin outputs CLKO which has
1/4 the frequency of OSC1 and denotes the
instruction cycle rate.
O
CLKO
O
RA6
I/O
ST
ST
Bidirectional I/O pin.
MCLR/VPP/RE3
MCLR
1
18
Master Clear (input) or programming voltage (output).
Master Clear (Reset) input. This pin is an
active-low Reset to the device.
I
VPP
RE3
P
I
Programming voltage input.
Digital input only pin.
ST
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
2
3
4
19
20
21
19
I/O
I
TTL
Digital I/O.
Analog input 0.
AN0
RA1/AN1
RA1
20
I/O
I
TTL
TTL
Digital I/O.
Analog input 1.
AN1
RA2/AN2/VREF-/CVREF
21
RA2
I/O
Digital I/O.
AN2
VREF-
CVREF
I
I
I
Analog input 2.
A/D reference voltage input (low).
Comparator voltage reference output.
RA3/AN3/VREF+
RA3
5
6
7
22
23
24
22
I/O
I
TTL
ST
Digital I/O.
Analog input 3.
A/D reference voltage input (high).
AN3
VREF+
I
RA4/T0CKI/C1OUT
RA4
23
I/O
I
Digital I/O – Open-drain when configured as output.
Timer0 external clock input.
Comparator 1 output.
T0CKI
C1OUT
O
RA5/AN4/LVDIN/SS/C2OUT
24
TTL
RA5
I/O
Digital I/O.
AN4
LVDIN
SS
I
I
I
I
Analog input 4.
Low-Voltage Detect input.
SPI™ slave select input.
Comparator 2 output.
C2OUT
Legend:
I = input
O = output
I/O = input/output
P = power
— = Not used
TTL = TTL input
ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as an external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured as a general purpose I/O and a TTL input when used in the Parallel
Slave Port mode (for interfacing to a microprocessor bus).
4: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.
5: Pin location of CCP2 is determined by the CCPMX bit in Configuration Word Register 1.
2004 Microchip Technology Inc.
DS30498C-page 11