PIC16F7X7
7.6
Timer1 Oscillator
7.7
Timer1 Oscillator Layout
Considerations
A crystal oscillator circuit is built between pins T1OSI
(input) and T1OSO (amplifier output). It is enabled by
setting control bit, T1OSCEN (T1CON<3>). The oscil-
lator is a low-power oscillator, rated up to 32.768 kHz.
It will continue to run during all power-managed modes.
It is primarily intended for a 32 kHz crystal. The circuit
for a typical LP oscillator is shown in Figure 7-3.
Table 7-1 shows the capacitor selection for the Timer1
oscillator.
The Timer1 oscillator circuit draws very little power
during operation. Due to the low-power nature of the
oscillator, it may also be sensitive to rapidly changing
signals in close proximity.
The oscillator circuit, shown in Figure 7-3, should be
located as close as possible to the microcontroller.
There should be no circuits passing within the oscillator
circuit boundaries other than VSS or VDD.
The user must provide a software time delay to ensure
proper oscillator start-up.
If a high-speed circuit must be located near the oscilla-
tor, a grounded guard ring around the oscillator circuit,
as shown in Figure 7-4, may be helpful when used on
a single sided PCB or in addition to a ground plane.
FIGURE 7-3:
EXTERNAL
COMPONENTS FOR THE
TIMER1 LP OSCILLATOR
FIGURE 7-4:
OSCILLATOR CIRCUIT
WITH GROUNDED
GUARD RING
C1
33 pF
PIC16F7X7
T1OSI
VSS
XTAL
32.768 kHz
OSC1
OSC2
T1OSO
C2
33 pF
Note:
See the Notes with Table 7-1 for additional
information about capacitor selection.
RC0
RC1
TABLE 7-1:
CAPACITOR SELECTION FOR
THE TIMER1 OSCILLATOR
RC2
Osc Type
Freq
C1
C2
7.8
Resetting Timer1 Using a CCP
Trigger Output
LP
32 kHz
33 pF
33 pF
Note 1: Microchip suggests this value as a starting
If the CCP1 module is configured in Compare mode to
generate “special event trigger” signal
point in validating the oscillator circuit.
a
(CCP1M3:CCP1M0 = 1011), the signal will reset
Timer1 and start an A/D conversion (if the A/D module
is enabled).
2: Higher capacitance increases the stability
of the oscillator but also increases the
start-up time.
Note:
The special event triggers from the CCP1
module will not set interrupt flag bit,
TMR1IF (PIR1<0>).
3: Since each resonator/crystal has its own
characteristics, the user should consult
the resonator/crystal manufacturer for
appropriate
components.
values
of
external
Timer1 must be configured for either Timer or Synchro-
nized Counter mode to take advantage of this feature.
If Timer1 is running in Asynchronous Counter mode,
this Reset operation may not work.
4: Capacitor values are for design guidance
only.
In the event that a write to Timer1 coincides with a
special event trigger from CCP1, the write will take
precedence.
In this mode of operation, the CCPR1H:CCPR1L
register pair effectively becomes the period register for
Timer1.
2004 Microchip Technology Inc.
DS30498C-page 81
MICROCHIP [ MICROCHIP ]
