PIC16F7X7
• Flag bit RCIF will be set when reception is
complete and an interrupt will be generated if
enable bit RCIE was set.
11.2.3
SETTING UP 9-BIT MODE WITH
ADDRESS DETECT
When setting up an Asynchronous Reception with
Address Detect enabled:
• Read the RCSTA register to get the ninth bit and
determine if any error occurred during reception.
• Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit BRGH.
• Read the 8-bit received data by reading the
RCREG register to determine if the device is
being addressed.
• Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
• If any error occurred, clear the error by clearing
enable bit CREN.
• If interrupts are desired, then set enable bit RCIE.
• Set bit RX9 to enable 9-bit reception.
• If the device has been addressed, clear the
ADDEN bit to allow data bytes and address bytes
to be read into the receive buffer and interrupt the
CPU.
• Set ADDEN to enable address detect.
• Enable the reception by setting enable bit CREN.
FIGURE 11-6:
AUSART RECEIVE BLOCK DIAGRAM
x64 Baud Rate CLK
FERR
OERR
CREN
FOSC
SPBRG
÷ 64
or
÷ 16
RSR Register
LSb
MSb
Baud Rate Generator
Stop (8)
7
1
0
Start
• • •
Pin Buffer
and Control
Data
Recovery
RX9
RC7/RX/DT
8
SPEN
Enable
Load of
Receive
Buffer
RX9
ADDEN
RX9
ADDEN
RSR<8>
8
RX9D
RCREG Register
FIFO
8
RCIF
RCIE
Interrupt
Data Bus
DS30498C-page 142
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
