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PIC16F777-I/PT 参数 Datasheet PDF下载

PIC16F777-I/PT图片预览
型号: PIC16F777-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚, 8位CMOS闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin, 8-Bit CMOS Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 276 页 / 4898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F7X7  
REGISTER 10-4: SSPCON: MSSP CONTROL (I2C MODE) REGISTER 1 (ADDRESS 14h)  
R/W-0  
WCOL  
R/W-0  
R/W-0  
R/W-0  
CKP  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
SSPOV  
SSPEN  
SSPM3  
SSPM2  
SSPM1  
SSPM0  
bit 7  
bit 0  
bit 7  
WCOL: Write Collision Detect bit  
In Master Transmit mode:  
1= A write to the SSPBUF register was attempted while the I2C conditions were not valid for  
a transmission to be started (must be cleared in software)  
0= No collision  
In Slave Transmit mode:  
1= The SSPBUF register is written while it is still transmitting the previous word (must be  
cleared in software)  
0= No collision  
In Receive mode (Master or Slave modes):  
This is a “don’t care” bit.  
bit 6  
SSPOV: Receive Overflow Indicator bit  
In Receive mode:  
1= A byte is received while the SSPBUF register is still holding the previous byte (must be  
cleared in software)  
0= No overflow  
In Transmit mode:  
This is a “don’t care” bit in Transmit mode.  
bit 5  
bit 4  
SSPEN: Synchronous Serial Port Enable bit  
1= Enables the serial port and configures the SDA and SCL pins as the serial port pins  
0= Disables serial port and configures these pins as I/O port pins  
Note:  
When enabled, the SDA and SCL pins must be properly configured as input or output.  
CKP: SCK Release Control bit  
In Slave mode:  
1= Release clock  
0= Holds clock low (clock stretch). (Used to ensure data setup time.)  
In Master mode:  
Unused in this mode.  
bit 3-0  
SSPM3:SSPM0: Synchronous Serial Port Mode Select bits  
1111= I2C Slave mode, 10-bit address with Start and Stop bit interrupts enabled  
1110= I2C Slave mode, 7-bit address with Start and Stop bit interrupts enabled  
1011= I2C Firmware Controlled Master mode (slave Idle)  
1000= I2C Master mode, clock = FOSC/(4 * (SSPADD + 1))  
0111= I2C Slave mode, 10-bit address  
0110= I2C Slave mode, 7-bit address  
Note:  
Bit combinations not specifically listed here are either reserved or implemented in  
SPI mode only.  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
DS30498C-page 104  
2004 Microchip Technology Inc.  
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