PIC16C71X
Applicable Devices 710 71 711 715
15.5
Timing Diagrams and Specifications
FIGURE 15-2: EXTERNAL CLOCK TIMING
Q1
1
Q2
Q3
Q4
Q1
Q4
OSC1
3
3
4
4
2
CLKOUT
TABLE 15-2: EXTERNAL CLOCK TIMING REQUIREMENTS
Parameter
No.
Sym Characteristic
Min
Typ†
Max
Units Conditions
Fosc External CLKIN Frequency
DC
DC
DC
DC
DC
0.1
1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TCY
—
—
—
—
—
—
4
4
MHz XT osc mode
MHz HS osc mode (-04)
MHz HS osc mode (-20)
kHz LP osc mode
MHz RC osc mode
MHz XT osc mode
MHz HS osc mode
MHz HS osc mode
(Note 1)
20
200
4
Oscillator Frequency
(Note 1)
4
4
1
20
1
Tosc External CLKIN Period
250
250
50
—
ns
ns
ns
µs
ns
ns
ns
ns
µs
µs
ns
µs
ns
ns
ns
ns
XT osc mode
HS osc mode (-04)
HS osc mode (-20)
LP osc mode
RC osc mode
XT osc mode
HS osc mode (-04)
HS osc mode (-20)
LP osc mode
TCY = 4/Fosc
XT oscillator
(Note 1)
—
—
5
—
Oscillator Period
(Note 1)
250
250
250
50
—
10,000
1,000
1,000
—
5
2
3
TCY
Instruction Cycle Time (Note 1)
1.0
50
DC
—
TosL, External Clock in (OSC1) High or
TosH Low Time
2.5
10
—
LP oscillator
—
HS oscillator
4
TosR, External Clock in (OSC1) Rise or
TosF Fall Time
25
—
XT oscillator
50
—
LP oscillator
15
—
HS oscillator
†
Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are based on
characterization data for that particular oscillator type under standard operating conditions with the device executing code.
Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current con-
sumption. All devices are tested to operate at "min." values with an external clock applied to the OSC1/CLKIN pin.
When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices. OSC2 is disconnected
(has no loading) for the PIC16C71.
1997 Microchip Technology Inc.
DS30272A-page 141
MICROCHIP [ MICROCHIP ]
