PIC16C71X
Applicable Devices 710 71 711 715
FIGURE 13-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, AND POWER-UP
TIMER TIMING
VDD
MCLR
30
Internal
POR
33
PWRT
Timeout
32
OSC
Timeout
Internal
RESET
Parity
Error
Reset
36
Watchdog
Timer
RESET
34
31
34
I/O Pins
FIGURE 13-5: BROWN-OUT RESET TIMING
BVDD
VDD
35
TABLE 13-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min
Typ†
Max Units
Conditions
30
TmcL MCLR Pulse Width (low)
2
7
—
—
µs VDD = 5V, -40˚C to +125˚C
31*
Twdt
Watchdog Timer Time-out Period
18
33
ms VDD = 5V, -40˚C to +125˚C
(No Prescaler)
32
33*
34
Tost
Oscillation Start-up Timer Period
—
28
—
1024TOSC
—
132
2.1
—
TOSC = OSC1 period
Tpwrt Power up Timer Period
72
—
ms VDD = 5V, -40˚C to +125˚C
TIOZ
I/O Hi-impedance from MCLR Low
µs
or Watchdog Timer Reset
Brown-out Reset pulse width
Parity Error Reset
35
36
TBOR
TPER
100
—
—
—
—
µs
µs
VDD ≤ BVDD (D005)
TBD
*
These parameters are characterized but not tested.
†
Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
DS30272A-page 120
1997 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
