PIC16C71X
Applicable Devices 710 71 711 715
FIGURE 13-6: TIMER0 CLOCK TIMINGS
RA4/T0CKI
41
40
42
TMR0
Note: Refer to Figure 13-1 for load conditions.
TABLE 13-5: TIMER0 CLOCK REQUIREMENTS
Param
No.
Sym
Characteristic
Min
Typ† Max Units Conditions
40
Tt0H
T0CKI High Pulse Width
No Prescaler
With Prescaler
No Prescaler
With Prescaler
0.5TCY + 20*
10*
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
41
42
Tt0L
Tt0P
T0CKI Low Pulse Width
T0CKI Period
0.5TCY + 20*
10*
Greater of:
ns N = prescale value
(1, 2, 4,..., 256)
20µs or TCY + 40*
N
48
Tcke2tmrI Delay from external clock edge to timer increment
These parameters are characterized but not tested.
2Tosc
—
7Tosc
—
*
†
Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
1997 Microchip Technology Inc.
DS30272A-page 121
MICROCHIP [ MICROCHIP ]
