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PIC16F628-04/SS 参数 Datasheet PDF下载

PIC16F628-04/SS图片预览
型号: PIC16F628-04/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 基于闪存的8位CMOS微控制器 [FLASH-Based 8-Bit CMOS Microcontrollers]
分类和应用: 闪存微控制器
文件页数/大小: 160 页 / 1657 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F62X  
14.10 Code Protection  
FIGURE 14-20: TYPICAL IN-CIRCUIT SERIAL  
PROGRAMMING  
If the code protection bit(s) have not been  
programmed, the on-chip program memory can be  
read out for verification purposes.  
CONNECTION  
To Normal  
Connections  
Note: The entire data EEPROM and FLASH  
program memory will be erased when the  
code protection is turned off. The INTRC  
calibration data is not erased.  
External  
Connector  
Signals  
PIC16F62X  
+5V  
0V  
VDD  
VSS  
14.11 ID Locations  
VPP  
RA5/MCLR/THV  
Four memory locations (2000h-2003h) are designated  
as ID locations where the user can store checksum or  
other code-identification numbers. These locations are  
not accessible during normal execution but are  
readable and writable during program/verify. Only the  
least significant 4 bits of the ID locations are used.  
RB6  
RB7  
CLK  
Data I/O  
VDD  
14.12 In-Circuit Serial Programming  
To Normal  
Connections  
The PIC16F62X microcontrollers can be serially  
programmed while in the end application circuit. This is  
simply done with two lines for clock and data, and three  
other lines for power, ground, and the programming  
voltage. This allows customers to manufacture boards  
with unprogrammed devices, and then program the  
microcontroller just before shipping the product. This  
also allows the most recent firmware or a custom  
firmware to be programmed.  
14.13 Low Voltage Programming  
The LVP bit of the configuration word, enables the low  
voltage programming. This mode allows the microcon-  
troller to be programmed via ICSP using only a 5V  
source. This mode removes the requirement of VIHH to  
be placed on the MCLR pin. The LVP bit is normally  
erased to ’1’ which enables the low voltage program-  
ming. In this mode, the RB4/PGM pin is dedicated to  
the programming function and ceases to be a general  
purpose I/O pin. The device will enter programming  
mode when a ’1’ is placed on the RB4/PGM pin. The  
HV programming mode is still available by placing VIHH  
on the MCLR pin.  
The device is placed into a program/verify mode by  
holding the RB6 and RB7 pins low while raising the  
MCLR (VPP) pin from VIL to VIHH (see programming  
specification). RB6 becomes the programming clock  
and RB7 becomes the programming data. Both RB6  
and RB7 are Schmitt Trigger inputs in this mode.  
After reset, to place the device into programming/verify  
mode, the program counter (PC) is at location 00h. A  
6-bit command is then supplied to the device.  
Depending on the command, 14-bits of program data  
are then supplied to or from the device, depending if the  
command was a load or a read. For complete details of  
serial programming, please refer to the Programming  
Specifications.  
Note 1: While in this mode the RB4 pin can no  
longer be used as a general purpose I/O  
pin.  
2: VDD must be 5.0V +10% during erase/pro-  
gram operations while in low voltage pro-  
gramming mode.  
A typical in-circuit serial programming connection is  
shown in Figure 14-20.  
If Low-voltage programming mode is not used, the LVP  
bit can be programmed to a ’0’ and RB4/PGM becomes  
a digital I/O pin. To program the device, VIHH must be  
placed onto MCLR during programming. The LVP bit  
may only be programmed when programming is  
entered with VIHH on MCLR. The LVP bit cannot be  
programmed when programming is entered with  
RB4/PGM.  
It should be noted, that once the LVP bit is programmed  
to 0, only the high voltage programming mode is avail-  
able and only high voltage programming mode can be  
used to program the device.  
DS40300B-page 112  
Preliminary  
1999 Microchip Technology Inc.  
 
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