PIC16F62X
14.7
Context Saving During Interrupts
14.8
Watchdog Timer (WDT)
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key reg-
isters during an interrupt e.g. W register and STATUS
register. This will have to be implemented in software.
The watchdog timer is a free running on-chip RC oscil-
lator which does not require any external components.
This RC oscillator is separate from the ER oscillator of
the CLKIN pin. That means that the WDT will run, even
if the clock on the OSC1 and OSC2 pins of the device
has been stopped, for example, by execution of a
SLEEP instruction. During normal operation, a WDT
time-out generates a device RESET. If the device is in
SLEEP mode, a WDT time-out causes the device to
wake-up and continue with normal operation. The WDT
can be permanently disabled by programming the con-
figuration bit WDTE as clear (Section 14.1).
Example 14-1 stores and restores the STATUS and W
registers. The user register, W_TEMP, must be defined
in both banks and must be defined at the same offset
from the bank base address (i.e., W_TEMP is defined
at 0x20 in Bank 0 and it must also be defined at 0xA0
in Bank 1). The user register, STATUS_TEMP, must be
defined in Bank 0. The Example 14-1:
• Stores the W register
14.8.1 WDT PERIOD
• Stores the STATUS register in Bank 0
• Executes the ISR code
The WDT has a nominal time-out period of 18 ms, (with
no prescaler). The time-out periods vary with tempera-
ture, VDD and process variations from part to part (see
DC specs). If longer time-out periods are desired, a
prescaler with a division ratio of up to 1:128 can be
assigned to the WDT under software control by writing
to the OPTION register. Thus, time-out periods up to
2.3 seconds can be realized.
• Restores the STATUS (and bank select bit
register)
• Restores the W register
EXAMPLE 14-1: SAVING THE STATUS AND
W REGISTERS IN RAM
MOVWF
W_TEMP
;copy W to temp register,
;could be in either bank
The CLRWDTand SLEEPinstructions clear the WDT
and the postscaler, if assigned to the WDT, and prevent
it from timing out and generating a device RESET.
SWAPF
BCF
STATUS,W
;swap status to be saved into W
STATUS,RP0
;change to bank 0 regardless
;of current bank
The TO bit in the STATUS register will be cleared upon
a Watchdog Timer time-out.
MOVWF
STATUS_TEMP
(ISR)
;save status to bank 0
;register
:
14.8.2 WDT PROGRAMMING CONSIDERATIONS
:
:
It should also be taken in account that under worst case
conditions (VDD = Min., Temperature = Max., max.
WDT prescaler) it may take several seconds before a
WDT time-out occurs.
SWAPF
STATUS_TEMP,W ;swap STATUS_TEMP register
;into W, sets bank to original
;state
MOVWF
SWAPF
SWAPF
STATUS
;move W into STATUS register
;swap W_TEMP
W_TEMP,F
W_TEMP,W
;swap W_TEMP into W
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 109
MICROCHIP [ MICROCHIP ]
