PIC16F7X
TABLE 12-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Power-on Reset,
Brown-out Reset
MCLR Reset,
WDT Reset
Wake-up via WDT or
Interrupt
Register
PIE2
Devices
73
73
73
73
73
73
73
73
73
73
73
73
73
74
74
74
74
74
74
74
74
74
74
74
74
74
76
76
76
76
76
76
76
76
76
76
76
76
76
77
77
77
77
77
77
77
77
77
77
77
77
77
---- ---0
---- --qq
1111 1111
--00 0000
0000 0000
0000 -010
0000 0000
---- -000
0--- 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
1--- ---0
---- ---0
---- --uu
1111 1111
--00 0000
0000 0000
0000 -010
0000 0000
---- -000
0--- 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
1--- ---0
---- ---u
---- --uu
1111 1111
--uu uuuu
uuuu uuuu
uuuu -uuu
uuuu uuuu
---- -uuu
u--- uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
1--- ---u
PCON
PR2
SSPSTAT
SSPADD
TXSTA
SPBRG
ADCON1
PMDATA
PMADR
PMDATH
PMADRH
PMCON1
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ’0’, q= value depends on condition,
r= reserved, maintain clear
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
3: See Table 12-5 for RESET value for specific condition.
FIGURE 12-6:
TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD THROUGH
RC NETWORK)
VDD
MCLR
INTERNAL POR
TPWRT
PWRT TIME-OUT
OST TIME-OUT
TOST
INTERNAL RESET
2002 Microchip Technology Inc.
DS30325B-page 97
MICROCHIP [ MICROCHIP ]
