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PIC16F73-I/SPG 参数 Datasheet PDF下载

PIC16F73-I/SPG图片预览
型号: PIC16F73-I/SPG
PDF下载: 下载PDF文件 查看货源
内容描述: [28 Pin, 7KB Std Flash, 192 RAM, 22 I/O, -40C to +85C, 28-SPDIP, TUBE]
分类和应用: 闪存微控制器
文件页数/大小: 174 页 / 3853 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F7X  
Some registers are not affected in any RESET condi-  
tion. Their status is unknown on POR and unchanged  
in any other RESET. Most other registers are reset to a  
RESET stateon Power-on Reset (POR), on the  
MCLR and WDT Reset, on MCLR Reset during  
SLEEP, and Brown-out Reset (BOR). They are not  
affected by a WDT Wake-up, which is viewed as the  
resumption of normal operation. The TO and PD bits  
are set or cleared differently in different RESET situa-  
tions, as indicated in Table 12-4. These bits are used in  
software to determine the nature of the RESET. See  
Table 12-6 for a full description of RESET states of all  
registers.  
12.3 RESET  
The PIC16F7X differentiates between various kinds of  
RESET:  
Power-on Reset (POR)  
MCLR Reset during normal operation  
MCLR Reset during SLEEP  
WDT Reset (during normal operation)  
WDT Wake-up (during SLEEP)  
Brown-out Reset (BOR)  
A simplified block diagram of the on-chip RESET circuit  
is shown in Figure 12-4.  
FIGURE 12-4:  
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT  
External  
RESET  
MCLR  
SLEEP  
WDT  
WDT  
Module  
Time-out  
Reset  
VDD Rise  
Detect  
VDD  
Power-on Reset  
Brown-out  
Reset  
S
BODEN  
OST/PWRT  
OST  
10-bit Ripple Counter  
Chip_Reset  
R
Q
OSC1  
(1)  
PWRT  
10-bit Ripple Counter  
On-chip  
RC OSC  
Enable PWRT  
Enable OST  
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.  
2002 Microchip Technology Inc.  
DS30325B-page 93  
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