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PIC16F684-I/P 参数 Datasheet PDF下载

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型号: PIC16F684-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 14引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 164 页 / 2585 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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PIC16F684
5.0
TIMER0 MODULE
The Timer0 module timer/counter has the following
features:
8-bit timer/counter
Readable and writable
8-bit software programmable prescaler
Internal or external clock select
Interrupt on overflow from FFh to 00h
Edge select for external clock
Counter mode is selected by setting the T0CS bit
(OPTION_REG<5>). In this mode, the Timer0 module
will increment either on every rising or falling edge of
pin RA2/T0CKI. The incrementing edge is determined
by
the
source
edge
(T0SE)
control
bit
(OPTION_REG<4>). Clearing the T0SE bit selects the
rising edge.
Note:
Counter mode has specific external clock
requirements. Additional information on
these requirements is available in the
”PICmicro
®
Mid-Range MCU Family
Reference Manual”
(DS33023).
the prescaler shared with the WDT.
Note:
Additional information on the Timer0
module is available in the “PICmicro
®
Mid-Range MCU Family Reference
Manual”
(DS33023).
5.2
Timer0 Interrupt
5.1
Timer0 Operation
Timer mode is selected by clearing the T0CS bit
(OPTION_REG<5>). In Timer mode, the Timer0
module will increment every instruction cycle (without
prescaler). If TMR0 is written, the increment is inhibited
for the following two instruction cycles. The user can
work around this by writing an adjusted value to the
TMR0 register.
A Timer0 interrupt is generated when the TMR0
register timer/counter overflows from FFh to 00h. This
overflow sets the T0IF bit (INTCON<2>). The interrupt
can be masked by clearing the T0IE bit (INTCON<5>).
The T0IF bit must be cleared in software by the Timer0
module Interrupt Service Routine before re-enabling
this interrupt. The Timer0 interrupt cannot wake the
processor from Sleep since the timer is shut off during
Sleep.
FIGURE 5-1:
CLKOUT
(= F
OSC
/4)
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
Data Bus
0
1
1
SYNC 2
Cycles
0
0
TMR0
8
T0CKI
pin
T0SE
T0CS
8-bit
Prescaler
1
8
Set Flag bit T0IF
on Overflow
PSA
WDTE
SWDTEN
PSA
PS<2:0>
16-bit
Prescaler
31 kHz
INTRC
Watchdog
Timer
WDTPS<3:0>
Note 1:
1
WDT
Time-out
0
16
PSA
T0SE, T0CS, PSA, PS<2:0> are bits in the Option register, WDTPS<3:0> are bits in the WDTCON register.
2004 Microchip Technology Inc.
Preliminary
DS41202C-page 45