PIC16F684
6.0
TIMER1 MODULE WITH GATE
CONTROL
The Timer1 Control register (T1CON), shown in
select the various features of the Timer1 module.
Note:
Additional information on timer modules is
available in the “PICmicro
®
Mid-Range
MCU
Family
Reference
Manual”
(DS33023).
The PIC16F684 has a 16-bit timer. Figure 6-1 shows
the basic block diagram of the Timer1 module. Timer1
has the following features:
16-bit timer/counter (TMR1H:TMR1L)
Readable and writable
Internal or external clock selection
Synchronous or asynchronous operation
Interrupt on overflow from FFFFh to 0000h
Wake-up upon overflow (Asynchronous mode)
Optional external enable input
- Selectable gate source: T1G or C2 output
(T1GSS)
- Selectable gate polarity (T1GINV)
• Optional LP oscillator
•
•
•
•
•
•
•
FIGURE 6-1:
TIMER1 ON THE PIC16F684 BLOCK DIAGRAM
TMR1ON
TMR1GE
TMR1ON
TMR1GE
TMR1
(1)
TMR1H
OSCILLATOR
(2)
T1GINV
Set Flag bit
TMR1IF on
Overflow
To C2 Comparator Module
TMR1 Clock
0
Synchronized
Clock Input
TMR1L
1
T1SYNC
1
F
OSC
/4
Internal
Clock
Prescaler
1, 2, 4, 8
0
2
T1CKPS<1:0>
TMR1CS
1
Sleep Input
Synchronize
det
OSC1/T1CKI
OSC2/T1G
INTOSC
without CLKOUT
T1OSCEN
C2OUT
Note 1:
2:
Timer1 increments on the rising edge.
ST Buffer is low power type when using LP oscillator or high speed type when
using T1CKI.
0
T1GSS
2004 Microchip Technology Inc.
Preliminary
DS41202C-page 49
MICROCHIP [ MICROCHIP TECHNOLOGY ]
