PIC16F872
REGISTER 11-1: CONFIGURATION WORD
CP1
CP0
DEBUG
—
WRT CPD
LVP
BODEN
CP1
CP0
PWRTE WDTE
F0SC1
F0SC0
bit0
Register: CONFIG
Address 2007h
bit13
bit 13-12:
(2)
bit 5-4: CP<1:0>: Flash Program Memory Code Protection bits
11= Code protection off
10= 0000h to 06FFh code protected
01= 0000h to 03FFh code protected
00= 0000h to 07FFh code protected
bit 11:
DEBUG: In-Circuit Debugger Mode
1= In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins.
0= In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
bit 10:
bit 9:
Unimplemented: Read as ‘1’
WRT: Flash Program Memory Write Enable
1= Unprotected program memory may be written to by EECON control
0= Unprotected program memory may not be written to by EECON control
bit 8:
bit 7:
bit 6:
bit 3:
bit 2:
CPD: Data EE Memory Code Protection
1= Code protection off
0= Data EEPROM memory code protected
LVP: Low Voltage In-Circuit Serial Programming Enable bit
1= RB3/PGM pin has PGM function, low voltage programming enabled
0= RB3 is digital I/O, HV on MCLR must be used for programming
(1)
BODEN: Brown-out Reset Enable bit
1= BOR enabled
0= BOR disabled
(1)
PWRTE: Power-up Timer Enable bit
1= PWRT disabled
0= PWRT enabled
WDTE: Watchdog Timer Enable bit
1= WDT enabled
0= WDT disabled
bit 1-0: FOSC1:FOSC0: Oscillator Selection bits
11= RC oscillator
10= HS oscillator
01= XT oscillator
00= LP oscillator
Note 1: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT), regardless of the value of bit PWRTE. Ensure
the Power-up Timer is enabled anytime Brown-out Reset is enabled.
2: All of the CP<1:0> pairs have to be given the same value to enable the code protection scheme listed.
DS30221A-page 96
Preliminary
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
