PIC16F872
2.2.2.4
PIE1 REGISTER
Note: Bit PEIE (INTCON<6>) must be set to
The PIE1 register contains the individual enable bits for
the peripheral interrupts.
enable any peripheral interrupt.
REGISTER 2-4: PIE1 REGISTER (ADDRESS 8Ch)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
ADIE
—
—
SSPIE CCP1IE TMR2IE TMR1IE
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
bit7
- n= Value at POR reset
bit 7:
bit 6:
Reserved: Always maintain this bit clear
ADIE: A/D Converter Interrupt Enable bit
1= Enables the A/D converter interrupt
0= Disables the A/D converter interrupt
bit 5-4: Reserved: Always maintain this bit clear
bit 3:
bit 2:
bit 1:
bit 0:
SSPIE: Synchronous Serial Port Interrupt Enable bit
1= Enables the SSP interrupt
0= Disables the SSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1= Enables the CCP1 interrupt
0= Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1= Enables the TMR2 to PR2 match interrupt
0= Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1= Enables the TMR1 overflow interrupt
0= Disables the TMR1 overflow interrupt
1999 Microchip Technology Inc.
Preliminary
DS30221A-page 15
MICROCHIP [ MICROCHIP ]
