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PIC16F627-04I/SO 参数 Datasheet PDF下载

PIC16F627-04I/SO图片预览
型号: PIC16F627-04I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 基于闪存的8位CMOS微控制器 [FLASH-Based 8-Bit CMOS Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 160 页 / 1657 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F62X  
17.3 DC CHARACTERISTICS: PIC16F62X (Commercial, Industrial, Extended)  
PIC16LF62X (Commercial, Industrial, Extended)  
Standard Operating Conditions (unless otherwise stated)  
Operating temperature  
–40°C TA +85°C for industrial and  
0°C TA +70°C for commercial and  
–40°C TA +125°C for extended  
Operating voltage VDD range as described in DC spec Table 17.1 and Table 12-2  
Param. Sym  
No.  
Characteristic  
Min  
Typ†  
Max  
Unit  
Conditions  
VIL  
Input Low Voltage  
I/O ports  
with TTL buffer  
D030  
VSS  
-
-
0.8V  
V
VDD = 4.5V to 5.5V  
otherwise  
0.15VDD  
0.2VDD  
0.2VDD  
D031  
D032  
with Schmitt Trigger input  
MCLR, RA4/T0CKI,OSC1 (in ER  
mode)  
VSS  
Vss  
V
V
Note1  
D033  
OSC1 (in XT and HS)  
OSC1 (in LP)  
Vss  
Vss  
-
-
0.3VDD  
V
V
0.6VDD-1.0  
VIH Input High Voltage  
I/O ports  
-
-
D040  
with TTL buffer  
2.0V  
.25VDD + 0.8V  
0.8VDD  
VDD  
VDD  
VDD  
V
VDD = 4.5V to 5.5V  
otherwise  
D041  
D042  
D043  
D043A  
D070  
with Schmitt Trigger input  
MCLR RA4/T0CKI  
OSC1 (XT, HS and LP)  
OSC1 (in ER mode)  
0.8VDD  
0.7VDD  
0.9VDD  
-
-
VDD  
VDD  
V
V
Note1  
IPURB PORTB weak pull-up current  
Input Leakage Current  
50  
200  
400  
µA VDD = 5.0V, VPIN = VSS  
IIL  
(Notes 2, 3)  
I/O ports (Except PORTA)  
PORTA  
±1.0  
±0.5  
±1.0  
±5.0  
µA VSS VPIN VDD, pin at hi-impedance  
µA Vss VPIN VDD, pin at hi-impedance  
D060  
D061  
D063  
-
-
-
-
-
-
RA4/T0CKI  
µA Vss VPIN VDD  
OSC1, MCLR  
µA Vss VPIN VDD, XT, HS and LP osc  
configuration  
VOL Output Low Voltage  
D080  
D083  
I/O ports  
-
-
-
-
-
-
-
-
0.6  
0.6  
0.6  
0.6  
V
V
V
V
IOL=8.5 mA, VDD=4.5V, -40° to +85°C  
IOL=7.0 mA, VDD=4.5V, +125°C  
IOL=1.6 mA, VDD=4.5V, -40° to +85°C  
IOL=1.2 mA, VDD=4.5V, +125°C  
OSC2/CLKOUT (ER only)  
VOH Output High Voltage (Note 3)  
D090  
D092  
*D150  
I/O ports (Except RA4)  
VDD-0.7  
VDD-0.7  
VDD-0.7  
VDD-0.7  
-
-
-
-
-
-
V
V
V
V
V
IOH=-3.0 mA, VDD=4.5V, -40° to +85°C  
IOH=-2.5 mA, VDD=4.5V, +125°C  
IOH=-1.3 mA, VDD=4.5V, -40° to +85°C  
IOH=-1.0 mA, VDD=4.5V, +125°C  
RA4 pin PIC16F62X, PIC16LF62X  
-
OSC2/CLKOUT (ER only)  
-
-
VOD Open-Drain High Voltage  
Capacitive Loading Specs on  
Output Pins  
8.5*  
D100  
COSC2 OSC2 pin  
-
-
15  
50  
pF In XT, HS and LP modes when external  
clock used to drive OSC1.  
pF  
D101  
Cio All I/O pins/OSC2 (in ER mode)  
*
These parameters are characterized but not tested.  
Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.  
Note 1: In ER oscillator configuration, the OSC1 pin is a Schmitt Trigger input. It is not recommended that the PIC16F62X be driven with  
external clock in ER mode.  
2: The leakage current on the MCLR pin is strongly dependent on applied voltage level. The specified levels represent normal operat-  
ing conditions. Higher leakage current may be measured at different input voltages.  
3: Negative current is defined as coming out of the pin.  
DS40300B-page 136  
Preliminary  
1999 Microchip Technology Inc.  
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