PIC16CE62X
A simple program to clear RAM location 20h-2Fh using
indirect addressing is shown in Example 4-1.
4.4
Indirect Addressing, INDF and FSR
Registers
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
EXAMPLE 4-1: INDIRECT ADDRESSING
movlw 0x20
movwf FSR
;initialize pointer
;to RAM
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses data pointed to by the file select register
(FSR). Reading INDF itself indirectly will produce 00h.
Writing to the INDF register indirectly results in a
no-operation (although status bits may be affected). An
effective 9-bit address is obtained by concatenating the
8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 4-13. However, IRP is not used in the
PIC16CE62X.
NEXT
clrf
incf
INDF
FSR
;clear INDF register
;inc pointer
btfss FSR,4 ;all done?
goto
NEXT
;no clear next
;yes continue
CONTINUE:
FIGURE 4-13: DIRECT/INDIRECT ADDRESSING PIC16CE62X
Direct Addressing
Indirect Addressing
(1)
(1)
from opcode
7
RP1 RP0
6
0
0
IRP
FSR register
bank select
00h
location select
bank select
location select
00
01
10
11
00h
not used
Data
Memory
7Fh
7Fh
Bank 0
Bank 1 Bank 2
Bank 3
For memory map detail see Figure 4-4 and Figure 4-5.
Note 1: The RP1 and IRP bits are reserved, always maintain these bits clear.
1998 Microchip Technology Inc.
Preliminary
DS40182A-page 21
MICROCHIP [ MICROCHIP ]
