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PIC16CE625-04/P 参数 Datasheet PDF下载

PIC16CE625-04/P图片预览
型号: PIC16CE625-04/P
PDF下载: 下载PDF文件 查看货源
内容描述: OTP 8位CMOS微控制器与EEPROM数据存储器 [OTP 8-Bit CMOS MCU with EEPROM Data Memory]
分类和应用: 存储微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 108 页 / 2330 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16CE62X  
4.3.2  
STACK  
4.3  
PCL and PCLATH  
The PIC16CE62X family has an 8 level deep x 13-bit  
wide hardware stack (Figure 4-2 and Figure 4-3). The  
stack space is not part of either program or data space  
and the stack pointer is not readable or writable. The  
PC is PUSHed onto the stack when a CALLinstruction  
is executed or an interrupt causes a branch. The stack  
is POPed in the event of a RETURN, RETLWor a RETFIE  
instruction execution. PCLATH is not affected by a  
PUSH or POP operation.  
The program counter (PC) is 13-bits wide. The low byte  
comes from the PCL register, which is a readable and  
writable register. The high byte (PC<12:8>) is not directly  
readable or writable and comes from PCLATH. On any  
reset, the PC is cleared. Figure 4-12 shows the two  
situations for the loading of the PC.The upper example in  
the figure shows how the PC is loaded on a write to PCL  
(PCLATH<4:0> PCH).The lower example in the figure  
shows how the PC is loaded during a CALL or GOTO  
instruction (PCLATH<4:3> PCH).  
The stack operates as a circular buffer.This means that  
after the stack has been PUSHed eight times, the ninth  
push overwrites the value that was stored from the first  
push. The tenth push overwrites the second push (and  
so on).  
FIGURE 4-12: LOADING OF PC IN  
DIFFERENT SITUATIONS  
PCH  
PCL  
Note 1: There are no STATUS bits to indicate  
stack overflow or stack underflow  
conditions.  
12  
8
7
0
Instruction with  
PCL as  
Destination  
PC  
8
PCLATH<4:0>  
PCLATH  
5
Note 2: There are no instruction mnemonics  
called PUSH or POP. These are actions  
that occur from the execution of the  
CALL, RETURN, RETLW and RETFIE  
instructions, or the vectoring to an  
interrupt address.  
ALU result  
PCH  
12 11 10  
PCL  
8
7
0
GOTO, CALL  
PC  
PCLATH<4:3>  
PCLATH  
11  
2
Opcode <10:0>  
4.3.1  
COMPUTED GOTO  
A computed GOTO is accomplished by adding an  
offset to the program counter (ADDWF PCL).When doing  
a table read using a computed GOTO method, care  
should be exercised if the table location crosses a PCL  
memory boundary (each 256 byte block). Refer to the  
application note “Implementing a Table Read" (AN556).  
DS40182A-page 20  
Preliminary  
1998 Microchip Technology Inc.  
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