PIC16F87XA
FIGURE 17-9:
CAPTURE/COMPARE/PWM TIMINGS (CCP1 AND CCP2)
RC1/T1OSI/CCP2
and RC2/CCP1
(Capture Mode)
50
51
52
RC1/T1OSI/CCP2
and RC2/CCP1
(Compare or PWM Mode)
53
Note: Refer to Figure 17-3 for load conditions.
54
TABLE 17-7: CAPTURE/COMPARE/PWM REQUIREMENTS (CCP1 AND CCP2)
Param
No.
Sym
Characteristic
Min
Typ† Max Units
Conditions
50* TccL CCP1 and CCP2 No Prescaler
input low time
0.5TCY + 20
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
Standard(F)
10
With Prescaler
Extended(LF)
20
0.5TCY + 20
10
51* TccH CCP1 and CCP2 No Prescaler
input high time
Standard(F)
With Prescaler
Extended(LF)
20
52* TccP CCP1 and CCP2 input period
3TCY + 40
N
ns N = prescale
value (1, 4 or 16)
53* TccR CCP1 and CCP2 output rise time Standard(F)
Extended(LF)
—
—
—
—
10
25
10
25
25
50
25
45
ns
ns
ns
ns
54* TccF CCP1 and CCP2 output fall time
Standard(F)
Extended(LF)
*
These parameters are characterized but not tested.
†
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
DS39582A-page 184
AdvanceInformation
2001 Microchip Technology Inc.