PIC16F87XA
FIGURE 17-6:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
VDD
MCLR
30
Internal
POR
33
PWRT
Time-out
32
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
31
34
34
I/O Pins
Note: Refer to Figure 17-3 for load conditions.
FIGURE 17-7:
BROWN-OUT RESET TIMING
VBOR
VDD
35
TABLE 17-5: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
Parameter
Symbol
Characteristic
Min
Typ†
Max
Units
Conditions
No.
30
TMCL
TWDT
MCLR Pulse Width (low)
2
7
—
—
µs
VDD = 5V, -40°C to +85°C
31*
Watchdog Timer Time-out Period
(No Prescaler)
18
33
ms VDD = 5V, -40°C to +85°C
32
TOST
Oscillation Start-up Timer Period
Power-up Timer Period
—
1024 TOSC
72
—
—
TOSC = OSC1 period
33*
TPWRT
28
132
ms VDD = 5V, -40°C to +85°C
34
TIOZ
I/O Hi-impedance from MCLR Low
or Watchdog Timer Reset
—
—
2.1
µs
35
TBOR
Brown-out Reset pulse width
100
—
—
µs
VDD ≤ VBOR (D005)
*
These parameters are characterized but not tested.
†
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
DS39582A-page 182
AdvanceInformation
2001 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
