PIC16F/LF1946/47
TABLE 29-14: SPI MODE REQUIREMENTS
Param
Symbol
Characteristic
Min.
Typ† Max. Units Conditions
No.
SP70* TSSL2SCH, SS to SCK or SCK input
TCY
—
—
ns
TSSL2SCL
SP71* TSCH
SP72* TSCL
SCK input high time (Slave mode)
SCK input low time (Slave mode)
TCY + 20
TCY + 20
100
—
—
—
—
—
—
ns
ns
ns
SP73* TDIV2SCH, Setup time of SDI data input to SCK edge
TDIV2SCL
SP74* TSCH2DIL, Hold time of SDI data input to SCK edge
TSCL2DIL
100
—
—
ns
SP75* TDOR
SDO data output rise time
3.0-5.5V
1.8-5.5V
—
—
—
10
—
—
—
—
—
Tcy
10
25
10
—
10
25
10
—
—
—
25
50
25
50
25
50
25
50
145
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SP76* TDOF
SDO data output fall time
SP77* TSSH2DOZ SS to SDO output high-impedance
SP78* TSCR
SCK output rise time
(Master mode)
3.0-5.5V
1.8-5.5V
SP79* TSCF
SCK output fall time (Master mode)
SP80* TSCH2DOV, SDO data output valid after
TSCL2DOV SCK edge
3.0-5.5V
1.8-5.5V
SP81* TDOV2SCH, SDO data output setup to SCK edge
TDOV2SCL
SP82* TSSL2DOV SDO data output valid after SS edge
—
—
—
50
—
ns
ns
SP83* TSCH2SSH, SS after SCK edge
1.5TCY + 40
TSCL2SSH
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
FIGURE 29-20:
I2C™ BUS START/STOP BITS TIMING
SCL
SP93
SP91
SP90
SP92
SDA
Stop
Condition
Start
Condition
Note: Refer to Figure 29-5 for load conditions.
2010 Microchip Technology Inc.
Preliminary
DS41414A-page 409