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PIC16LF1947-E/MR 参数 Datasheet PDF下载

PIC16LF1947-E/MR图片预览
型号: PIC16LF1947-E/MR
PDF下载: 下载PDF文件 查看货源
内容描述: [64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology]
分类和应用: 微控制器
文件页数/大小: 440 页 / 4740 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F/LF1946/47  
23.6.8  
ACKNOWLEDGE SEQUENCE  
TIMING  
23.6.9  
STOP CONDITION TIMING  
A Stop bit is asserted on the SDAx pin at the end of a  
receive/transmit by setting the Stop Sequence Enable  
bit, PEN bit of the SSPxCON2 register. At the end of a  
receive/transmit, the SCLx line is held low after the  
falling edge of the ninth clock. When the PEN bit is set,  
the master will assert the SDAx line low. When the  
SDAx line is sampled low, the Baud Rate Generator is  
reloaded and counts down to ‘0’. When the Baud Rate  
Generator times out, the SCLx pin will be brought high  
and one TBRG (Baud Rate Generator rollover count)  
later, the SDAx pin will be deasserted. When the SDAx  
pin is sampled high while SCLx is high, the P bit of the  
SSPxSTAT register is set. A TBRG later, the PEN bit is  
cleared and the SSPxIF bit is set (Figure 23-30).  
An Acknowledge sequence is enabled by setting the  
Acknowledge Sequence Enable bit, ACKEN bit of the  
SSPxCON2 register. When this bit is set, the SCLx pin is  
pulled low and the contents of the Acknowledge data bit  
are presented on the SDAx pin. If the user wishes to  
generate an Acknowledge, then the ACKDT bit should  
be cleared. If not, the user should set the ACKDT bit  
before starting an Acknowledge sequence. The Baud  
Rate Generator then counts for one rollover period  
(TBRG) and the SCLx pin is deasserted (pulled high).  
When the SCLx pin is sampled high (clock arbitration),  
the Baud Rate Generator counts for TBRG. The SCLx pin  
is then pulled low. Following this, the ACKEN bit is auto-  
matically cleared, the Baud Rate Generator is turned off  
and the MSSPx module then goes into Idle mode  
(Figure 23-29).  
23.6.9.1  
WCOL Status Flag  
If the user writes the SSPxBUF when a Stop sequence  
is in progress, then the WCOL bit is set and the  
contents of the buffer are unchanged (the write doesn’t  
occur).  
23.6.8.1  
WCOL Status Flag  
If the user writes the SSPxBUF when an Acknowledge  
sequence is in progress, then WCOL is set and the  
contents of the buffer are unchanged (the write doesn’t  
occur).  
FIGURE 23-30:  
ACKNOWLEDGE SEQUENCE WAVEFORM  
Acknowledge sequence starts here,  
write to SSPxCON2  
ACKEN automatically cleared  
ACKEN = 1, ACKDT = 0  
TBRG  
ACK  
TBRG  
SDAx  
SCLx  
D0  
8
9
SSPxIF  
Cleared in  
SSPxIF set at  
the end of receive  
software  
Cleared in  
software  
SSPxIF set at the end  
of Acknowledge sequence  
Note: TBRG = one Baud Rate Generator period.  
DS41414A-page 274  
Preliminary  
2010 Microchip Technology Inc.  
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