PIC16F/LF1946/47
FIGURE 2-1:
CORE BLOCK DIAGRAM
15
Configuration
15
8
Data Bus
RAM
Program Counter
Flash
Program
Memory
186-LLeevveellSStatacckk
(153-bit)
Program
Bus
14
RAM Addr
Program Memory
Read (PMR)
12
Addr MUX
IInnssttrruuccttiioonnRreegg
Indirect
Addr
7
Direct Addr
12
12
5
BSR Reg
FSR reg
15
FSR0 Reg
reg
FSR1 Reg
FSR reg
15
SSTTAATTUUSSRreegg
8
3
MUX
Power-up
Timer
Oscillator
Instruction
DDeeccooddeea&nd
Control
Start-up Timer
ALU
Power-on
Reset
OSC1/CLKIN
8
Timing
Generation
Watchdog
Timer
W Reg
OSC2/CLKOUT
Brown-out
Reset
Internal
Oscillator
Block
VDD
VSS
DS41414A-page 18
Preliminary
2010 Microchip Technology Inc.