PIC16F/LF1946/47
TABLE 15-3: SUMMARY OF REGISTERS ASSOCIATED WITH ADC
Register
on Page
Name
ADCON0
ADCON1
ADRESH
ADRESL
ANSELA
ANSELE
CCP1CON
INTCON
PIE1
Bit 7
—
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CHS<4:0>
GO/DONE
ADON
159
160
162
162
125
137
229
89
ADFM
ADCS<2:0>
—
ADNREF
ADPREF<1:0>
A/D Result Register High
A/D Result Register Low
—
—
—
—
ANSA5
—
ANSA4
—
ANSA3
—
ANSA2
ANSE2
ANSA1
ANSE1
ANSA0
ANSE0
P1M<1:0>
DC1B<1:0>
CCP1M<3:0>
GIE
TMR1GIE
TMR1GIF
TRISA7
TRISB7
—
PEIE
ADIE
TMR0IE
RCIE
INTE
TXIE
IOCIE
SSPIE
SSPIF
TMR0IF
CCP1IE
CCP1IF
TRISA2
TRISB2
TRISE2
INTF
IOCIF
TMR2IE
TMR2IF
TRISA1
TRISB1
TRISE1
TMR1IE
TMR1IF
TRISA0
TRISB0
TRISE0
90
PIR1
ADIF
RCIF
TXIF
94
TRISA
TRISA6
TRISB6
—
TRISA5
TRISB5
—
TRISA4
TRISB4
—
TRISA3
TRISB3
TRISE3
124
127
136
152
171
171
TRISB
TRISE
FVRCON
DACCON0
DACCON1
Legend:
FVREN
DACEN
—
FVRRDY
DACLPS
—
Reserved Reserved
CDAFVR<1:0>
DACPSS<1:0>
DACR<4:0>
ADFVR<1:0>
DACOE
—
—
—
DACNSS
x= unknown, u= unchanged, —= unimplemented read as ‘0’, q= value depends on condition. Shaded cells are not
used for ADC module.
2010 Microchip Technology Inc.
Preliminary
DS41414A-page 165