PIC16C63A/65B/73B/74B
TABLE 13-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Power-on Reset
Brown-out Reset
MCLR Resets
WDT Reset
Wake-up via WDT or
Interrupt
Register
Applicable Devices
ADCON0
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
0000 00-0
1111 1111
--11 1111
1111 1111
1111 1111
1111 1111
0000 -111
--00 0000
0-00 0000
-000 0000
0000 0000
---- ---0
0000 00-0
1111 1111
--11 1111
1111 1111
1111 1111
1111 1111
0000 -111
--00 0000
0-00 0000
-000 0000
0000 0000
---- ---0
---- --uu
uuuu uu-u
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu -uuu
--uu uuuu
u-uu uuuu
-uuu uuuu
uuuu uuuu
---- ---u
---- --uu
OPTION_REG
TRISA
TRISB
TRISC
TRISD
TRISE
PIE1
PIE2
---- --0q(3)
1111 1111
0000 0000
--00 0000
0000 -010
0000 0000
---- -000
PCON
PR2
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
1111 1111
0000 0000
--00 0000
0000 -010
0000 0000
---- -000
1111 1111
uuuu uuuu
--uu uuuu
uuuu -uuu
uuuu uuuu
---- -uuu
SSPADD
SSPSTAT
TXSTA
SPBRG
ADCON1
Legend: u= unchanged, x= unknown, - = unimplemented bit, read as ’0’, q= value depends on condition
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3: See Table 13-5 for RESET value for specific condition.
DS30605C-page 92
2000 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
