PIC16C63A/65B/73B/74B
TABLE 13-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Power-on Reset
Brown-out Reset
MCLR Resets
WDT Reset
Wake-up via WDT or
Interrupt
Register
Applicable Devices
W
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
xxxx xxxx
N/A
uuuu uuuu
N/A
uuuu uuuu
N/A
INDF
TMR0
PCL
xxxx xxxx
0000h
uuuu uuuu
0000h
uuuu uuuu
PC + 1(2)
000q quuu(3)
uuuu uuuu
--0u 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---0 0000
0000 000u
uuuq quuu(3)
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---u uuuu
STATUS
63A 65B 73B 74B
0001 1xxx
FSR
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
xxxx xxxx
--0x 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- -xxx
---0 0000
0000 000x
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
uuuu uuuu(1)
-u-- uuuu(1)
-uuu uuuu(1)
uuuu uuuu(1)
uuuu uuuu(1)
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
-0-- 0000
-000 0000
0000 0000
0000 0000
---- ---0
-0-- 0000
-000 0000
0000 0000
0000 0000
---- ---0
PIR1
PIR2
---- ---u(1)
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TMR1L
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
63A 65B 73B 74B
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 -00x
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0000
-000 0000
uuuu uuuu
0000 0000
uuuu uuuu
uuuu uuuu
--00 0000
0000 -00x
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 0000
uuuu uuuu
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
CCP2CON
ADRES
Legend: u= unchanged, x= unknown, - = unimplemented bit, read as ’0’, q= value depends on condition
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3: See Table 13-5 for RESET value for specific condition.
2000 Microchip Technology Inc.
DS30605C-page 91
MICROCHIP [ MICROCHIP ]
