PIC16C62B/72A
2.2.2.2
OPTION_REG REGISTER
Note:
To achieve a 1:1 prescaler assignment for
the TMR0 register, assign the prescaler to
the Watchdog Timer.
The OPTION_REG register is a readable and writable
register, which contains various control bits to configure
the TMR0 prescaler/WDT postscaler (single assign-
able register known as the prescaler), the External INT
Interrupt, TMR0 and the weak pull-ups on PORTB.
REGISTER 2-2:
R/W-1
RBPU
bit7
R/W-1
INTEDG
OPTION_REG REGISTER (ADDRESS 81h)
R/W-1
T0CS
R/W-1
T0SE
R/W-1
PSA
R/W-1
PS2
R/W-1
PS1
R/W-1
PS0
bit0
R = Readable bit
W = Writable bit
- n = Value at POR reset
bit 7:
RBPU:
PORTB Pull-up Enable bit
1
= PORTB pull-ups are disabled
0
= PORTB pull-ups are enabled for all PORTB inputs
INTEDG:
Interrupt Edge Select bit
1
= Interrupt on rising edge of RB0/INT pin
0
= Interrupt on falling edge of RB0/INT pin
T0CS:
TMR0 Clock Source Select bit
1
= Transition on RA4/T0CKI pin
0
= Internal instruction cycle clock (CLKOUT)
T0SE:
TMR0 Source Edge Select bit
1
= Increment on high-to-low transition on RA4/T0CKI pin
0
= Increment on low-to-high transition on RA4/T0CKI pin
PSA:
Prescaler Assignment bit
1
= Prescaler is assigned to the WDT
0
= Prescaler is assigned to the Timer0 module
bit 6:
bit 5:
bit 4:
bit 3:
bit 2-0:
PS2:PS0:
Prescaler Rate Select bits
Bit Value
000
001
010
011
100
101
110
111
TMR0 Rate
1:2
1:4
1:8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
WDT Rate
1:1
1:2
1:4
1:8
1 : 16
1 : 32
1 : 64
1 : 128
DS35008B-page 12
Preliminary
©
1999 Microchip Technology Inc.