PIC16C62B/72A
2.2.2.5
PIR1 REGISTER
Note: Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
This register contains the individual flag bits for the
Peripheral interrupts.
REGISTER 2-5: PIR1 REGISTER (ADDRESS 0Ch)
U-0
R/W-0
U-0
U-0
R/W-0
SSPIF
R/W-0
R/W-0
TMR2IF TMR1IF
bit0
R/W-0
(1)
—
ADIF
—
—
CCP1IF
R
= Readable bit
W = Writable bit
bit7
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit 7:
Unimplemented: Read as ‘0’
ADIF(1): A/D Converter Interrupt Flag bit
bit 6:
1= An A/D conversion completed (must be cleared in software)
0= The A/D conversion is not complete
bit 5-4: Unimplemented: Read as ‘0’
bit 3:
SSPIF: Synchronous Serial Port Interrupt Flag bit
1= The transmission/reception is complete (must be cleared in software)
0= Waiting to transmit/receive
bit 2:
CCP1IF: CCP1 Interrupt Flag bit
Capture Mode
1= A TMR1 register capture occurred (must be cleared in software)
0= No TMR1 register capture occurred
Compare Mode
1= A TMR1 register compare match occurred (must be cleared in software)
0= No TMR1 register compare match occurred
PWM Mode
Unused in this mode
bit 1:
bit 0:
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1= TMR2 to PR2 match occurred (must be cleared in software)
0= No TMR2 to PR2 match occurred
TMR1IF: TMR1 Overflow Interrupt Flag bit
1= TMR1 register overflowed (must be cleared in software)
0= TMR1 register did not overflow
Note 1: The PIC16C62B does not have an A/D module. This bit location is reserved on these devices. Always maintain this
bit clear.
1999 Microchip Technology Inc.
Preliminary
DS35008B-page 15
MICROCHIP [ MICROCHIP ]
