PIC12F683
1.0
DEVICE OVERVIEW
The PIC12F683 is covered by this data sheet. It is
available in 8-pin PDIP, SOIC and DFN-S packages.
device. Table 1-1 shows the pinout description.
FIGURE 1-1:
PIC12F683 BLOCK DIAGRAM
INT
Configuration
13
Program Counter
Flash
2k x 14
Program
Memory
Data Bus
8
GP0
GP1
8-Level Stack
(13-bit)
RAM
128 bytes
File
Registers
RAM Addr
9
Addr MUX
Direct Addr
7
Indirect
Addr
GP2
GP3
GP4
GP5
Program
Bus
14
Instruction Reg
8
FSR Reg
STATUS Reg
8
3
Power-up
Timer
Instruction
Decode &
Control
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Internal
Oscillator
Block
8
W Reg
MUX
ALU
OSC1/CLKIN
OSC2/CLKOUT
Timing
Generation
CCP1
T1G
T1CKI
Timer0
T0CKI
Timer1
Timer2
CCP
MCLR
V
DD
V
SS
Analog-to-Digital Converter
1 Analog Comparator
8
EEDATA
256 bytes
Data
EEPROM
EEADDR
V
REF
AN0 AN1 AN2 AN3
CV
REF
CIN-
CIN+
COUT
©
2007 Microchip Technology Inc.
DS41211D-page 5
MICROCHIP [ MICROCHIP TECHNOLOGY ]
