PIC12F683
8-Pin Diagram (PDIP, SOIC)
V
DD
GP5/T1CKI/OSC1/CLKIN
GP4/AN3/T1G/OSC2/CLKOUT
GP3/MCLR/V
PP
1
2
3
4
PIC12F683
8
7
6
5
V
SS
GP0/AN0/CIN+/ICSPDAT/ULPWU
GP1/AN1/CIN-/V
REF
/ICSPCLK
GP2/AN2/T0CKI/INT/COUT/CCP1
8-Pin Diagram (DFN)
V
DD
GP5/TICKI/OSC1/CLKIN
GP4/AN3/TIG/OSC2/CLKOUT
GP3/MCLR/V
PP
1
2
PIC12F683
3
4
8
7
6
5
V
SS
GP0/AN0/CIN+/ICSPDAT/ULPWU
GP1/AN1/CIN-/V
REF
/ICSPCLK
GP2/AN2/T0CKI/INT/COUT/CCP1
8-Pin Diagram (DFN-S)
V
DD
GP5/TICKI/OSC1/CLKIN
GP4/AN3/TIG/OSC2/CLKOUT
GP3/MCLR/V
PP
1
2
PIC12F683
3
4
8
7
6
5
V
SS
GP0/AN0/CIN+/ICSPDAT/ULPWU
GP1/AN1/CIN-/V
REF
/ICSPCLK
GP2/AN2/T0CKI/INT/COUT/CCP1
TABLE 1:
I/O
GP0
GP1
GP2
GP3
GP4
GP5
—
—
Note 1:
2:
Pin
7
6
5
4
3
2
1
8
8-PIN SUMMARY
Analog
AN0
AN1/V
REF
AN2
—
AN3
—
—
—
Comparators
CIN+
CIN-
COUT
—
—
—
—
—
Timer
—
—
T0CKI
—
T1G
T1CKI
—
—
CCP
—
—
CCP1
—
—
—
—
—
Interrupts
IOC
IOC
INT/IOC
IOC
IOC
IOC
—
—
Pull-ups
Y
Y
Y
Y
(2)
Y
Y
—
—
Basic
ICSPDAT/ULPWU
ICSPCLK
—
MCLR/V
PP
OSC2/CLKOUT
OSC1/CLKIN
V
DD
V
SS
Input only.
Only when pin is configured for external MCLR.
DS41211D-page 2
©
2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
