PIC12F635/PIC16F636/639
14-Pin Diagram (PDIP, SOIC, TSSOP)
VDD
RA5/T1CKI/OSC1/CLKIN
RA4/T1G/OSC2/CLKOUT
RA3/MCLR/VPP
RC5
1
2
3
4
5
6
7
VSS
14
13
12
11
10
9
RA0/C1IN+/ICSPDAT/ULPWU
RA1/C1IN-/VREF/ICSPCLK
RA2/T0CKI/INT/C1OUT
RC0/C2IN+
RC1/C2IN-
RC2
RC4/C2OUT
RC3
8
TABLE 2:
I/O
14-PIN SUMMARY (PDIP, SOIC, TSSOP)
Pin
Comparators
Timer
Interrupts
Pull-ups
Basic
RA0
13
12
11
C1IN+
C1IN-
—
—
IOC
IOC
Y
Y
Y
ICSPDAT/ULPWU
VREF/ICSPCLK
—
RA1
RA2
C1OUT
T0CKI
INT/IOC
RA3(1)
4
3
—
—
—
T1G
T1CKI
—
IOC
IOC
IOC
—
Y(2)
Y
MCLR/VPP
RA4
RA5
RC0
RC1
RC2
RC3
RC4
RC5
—
OSC2/CLKOUT
2
—
Y
OSC1/CLKIN
10
9
C2IN+
C2IN-
—
—
—
—
—
—
—
—
—
—
—
—
—
8
—
—
—
7
—
—
—
—
6
C2OUT
—
—
—
—
5
—
—
—
1
—
—
—
VDD
VSS
—
14
—
—
—
Note 1: Input only.
2: Only when pin is configured for external MCLR.
DS41232D-page 4
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
