PIC12F635/PIC16F636/639
They are not affected by a WDT wake-up since this is
viewed as the resumption of normal operation. TO and
12.2 Reset
The PIC12F635/PIC16F636/639 differentiates between
various kinds of Reset:
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 12-3. These bits are
used in software to determine the nature of the Reset.
See Table 12-4 for a full description of Reset states of
all registers.
a) Power-on Reset (POR)
b) Wake-up Reset (WUR)
c) WDT Reset during normal operation
d) WDT Reset during Sleep
e) MCLR Reset during normal operation
f) MCLR Reset during Sleep
g) Brown-out Reset (BOR)
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 12-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 15.0 “Electrical
Specifications” for pulse width specifications.
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset
FIGURE 12-1:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Sleep
WURE
External Reset
Sleep
Wake-up Interrupt
RA3 Change
MCLR/VPP pin
WDT
WDT
Module
Time-out
Reset
VDD Rise
Detect
Power-on Reset
VDD
Brown-out(1)
Reset
<1>
BOREN
BOREN<0>
SBOREN
S
R
OST/PWRT
Chip_Reset
OST
10-bit Ripple Counter
Q
OSC1/
CLKI pin
PWRT
11-bit Ripple Counter
LFINTOSC
Enable PWRT
Enable OST
Note 1: Refer to the Configuration Word register (Register 12-1).
© 2007 Microchip Technology Inc.
DS41232D-page 131
MICROCHIP [ MICROCHIP ]
