PIC12F635/PIC16F636/639
FIGURE 11-17:
SPI WRITE SEQUENCE
TCSH
2
6
CS
TCSSC
TSCCS TCS1
TCS0
16 Clocks for Write Command, Address and Data
4
THI
TLO
7
SCLK/
ALERT
MSb
THD
LSb
SCLK
(input)
ALERT
(output)
1/FSCLK
ALERT
(output)
1
TSU
LFDATA/RSSI/
CCLK/SDIO
LFDATA
(output)
SDI
(input)
LFDATA
(output)
5
3
MCU SPI Write Details:
1.
Drive the AFE’s open collector ALERT output low.
To ensure no false clocks occur when CS drops.
Drop CS.
•
2.
•
•
AFE SCLK/ALERT becomes SCLK input.
LFDATA/RSSI/CCLK/SDIO becomes SDI input.
3.
4.
Change LFDATA/RSSI/CCLK/SDIO connected pin to output.
Driving SPI data.
Clock in 16-bit SPI Write sequence - command, address, data and parity bit.
Command, address, data and parity bit.
•
•
5.
6.
7.
Change LFDATA/RSSI/CCLK/SDIO connected pin to input.
Raise CS to complete the SPI Write.
Change SCLK/ALERT back to input.
© 2007 Microchip Technology Inc.
DS41232D-page 119