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PIC12F635-I/SN 参数 Datasheet PDF下载

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型号: PIC12F635-I/SN
PDF下载: 下载PDF文件 查看货源
内容描述: 8月14日引脚,基于闪存的8位CMOS微控制器采用纳瓦技术 [8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 234 页 / 3856 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC12F635/PIC16F636/639  
TABLE 11-2: INPUT SENSITIVITY VS. MODULATED SIGNAL STRENGTH SETTING (AGCSIG <7>)  
Input  
Sensitivity  
(Typical)  
AGCSIG<7>  
(Config. Register 5)  
Description  
0
Disabled – the AFE passes signal of any amplitude level it is capable of  
detecting (demodulated data and carrier clock).  
3.0 mVPP  
1
Enabled – No output until AGC Status = 1(i.e., VPEAK 20 mVPP)  
(demodulated data and carrier clock).  
20 mVPP  
• Provides the best signal to noise ratio.  
11.17 Input Channels (Enable/Disable)  
11.19 AGC Preserve  
Each channel can be individually enabled or disabled  
by programming bits in Configuration Register 0<3:1>  
(Register 11-1).  
The AGC preserve feature allows the AFE to preserve  
the AGC value during the AGC settling time (TAGC) and  
apply the value to the data slicing circuit for the following  
data streams instead of using a new tracking value. This  
feature is useful to demodulate the input signal correctly  
when the input has random amplitude variations at a  
given time period. This feature is enabled when the AFE  
receives an AGC Preserve On command and disabled  
if it receives an AGC Preserve Off command. Once the  
AGC Preserve On command is received, the AFE  
acquires a new AGC value during each AGC settling  
time and preserves the value until a Soft Reset or an  
AGC Preserve Off command is issued. Therefore, it  
does not need to issue another AGC Preserve On  
command. An AGC Preserve Off command is needed to  
The purpose of having an option to disable a particular  
channel is to minimize current draw by powering down  
as much circuitry as possible, if the channel is not  
needed for operation. The exact circuits disabled when  
an input is disabled are amplifiers, detector, full-wave  
rectifier, data slicer, and modulation FET. However, the  
RF input limiter remains active to protect the silicon  
from excessive antenna input voltages.  
11.18 AGC Amplifier  
The circuit automatically amplifies input signal voltage  
levels to an acceptable level for the data slicer. Fast  
attack and slow release by nature, the AGC tracks the  
carrier signal level and not the modulated data bits.  
disable  
Section 11.32.2.5 “AGC Preserve On Command”  
and Section 11.32.2.6 “AGC Preserve Off  
Command” for AGC Preserve commands).  
the  
AGC  
preserve  
feature  
(see  
The AGC inherently tracks the strongest of the three  
antenna input signals. The AGC requires an AGC  
stabilization time (TAGC).  
The AGC will attempt to regulate a channel’s peak  
signal voltage into the data slicer to a desired regulated  
AGC voltage – reducing the input path’s gain as the  
signal level attempts to increase above regulated AGC  
voltage, and allowing full amplification on signal levels  
below the regulated AGC voltage.  
The AGC has two modes of operation:  
1. During the AGC settling time (TAGC), the AGC  
time constant is fast, allowing a reasonably short  
acquisition time of the continuous input signal.  
2. After TAGC, the AGC switches to a slower time  
constant for data slicing.  
Also, the AGC is frozen when the input signal envelope  
is low. The AGC tracks only high envelope levels.  
DS41232D-page 106  
© 2007 Microchip Technology Inc.  
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