PIC12F629/675
12.6 DC Characteristics: PIC12F629/675-I (Industrial), PIC12F629/675-E (Extended)
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for industrial
-40°C ≤ TA ≤ +±25°C for extended
DC CHARACTERISTICS
Param
No.
Sym
Characteristic
Min
Typ†
Max
Units
Conditions
Input Low Voltage
I/O ports
VIL
—
—
—
—
—
—
D030
D030A
D03±
D032
D033
D033A
with TTL buffer
VSS
VSS
VSS
VSS
VSS
VSS
0.8
V
V
V
V
V
V
4.5V ≤ VDD ≤ 5.5V
0.±5 VDD
0.2 VDD
0.2 VDD
0.3
Otherwise
with Schmitt Trigger buffer
MCLR, OSC± (RC mode)
OSC± (XT and LP modes)
OSC± (HS mode)
Entire range
(Note 1)
(Note 1)
0.3 VDD
Input High Voltage
I/O ports
—
VIH
—
—
D040
D040A
with TTL buffer
2.0
(0.25 VDD+0.8)
VDD
VDD
V
V
4.5V ≤ VDD ≤ 5.5V
otherwise
—
—
D04±
with Schmitt Trigger buffer
MCLR
0.8 VDD
0.8 VDD
±.6
VDD
VDD
VDD
VDD
VDD
400*
entire range
D042
V
V
V
V
—
D043
OSC± (XT and LP modes)
OSC± (HS mode)
OSC± (RC mode)
(Note 1)
(Note 1)
—
D043A
D043B
0.7 VDD
0.9 VDD
50*
—
D070 IPUR GPIO Weak Pull-up Current
250
µA VDD = 5.0V, VPIN = VSS
(3)
Input Leakage Current
—
D060
IIL
I/O ports
0.±
±
µA VSS ≤ VPIN ≤ VDD,
Pin at hi-impedance
—
—
—
—
D060A
D060B
D06±
Analog inputs
0.±
0.±
0.±
0.±
±
±
5
5
µA VSS ≤ VPIN ≤ VDD
µA VSS ≤ VPIN ≤ VDD
µA VSS ≤ VPIN ≤ VDD
VREF
(2)
MCLR
D063
OSC±
µA VSS ≤ VPIN ≤ VDD, XT, HS and
LP osc configuration
Output Low Voltage
—
—
—
—
D080 VOL I/O ports
D083 OSC2/CLKOUT (RC mode)
0.6
0.6
V
V
IOL = 8.5 mA, VDD = 4.5V (Ind.)
IOL = ±.6 mA, VDD = 4.5V (Ind.)
IOL = ±.2 mA, VDD = 4.5V (Ext.)
Output High Voltage
D090 VOH I/O ports
D092 OSC2/CLKOUT (RC mode)
—
—
—
—
VDD - 0.7
VDD - 0.7
V
V
IOH = -3.0 mA, VDD = 4.5V (Ind.)
IOH = -±.3 mA, VDD = 4.5V (Ind.)
IOH = -±.0 mA, VDD = 4.5V (Ext.)
*
These parameters are characterized but not tested.
†
Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: In RC oscillator configuration, the OSC±/CLKIN pin is a Schmitt Trigger input. It is not recommended to use
an external clock in RC mode.
2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels
represent normal operating conditions. Higher leakage current may be measured at different input voltages.
3: Negative current is defined as current sourced by the pin.
2003 Microchip Technology Inc.
DS41190C-page 91
MICROCHIP [ MICROCHIP ]
