PIC12C5XX
13.4
DC CHARACTERISTICS:
PIC12LC508A/509A (Commercial, Industrial)
PIC12LC518/519 (Commercial, Industrial)
PIC12LCR509A (Commercial, Industrial)
Standard Operating Conditions (unless otherwise specified)
Operating temperature
0°C ≤ TA ≤ +70°C (commercial)
–40°C ≤ TA ≤ +85°C (industrial)
DC CHARACTERISTICS
Operating voltage VDD range as described in DC spec Section 13.1 and
Section 13.2.
Param
No.
Characteristic
Sym
Min
Typ† Max
Units
Conditions
Input Low Voltage
I/O ports
VIL
D030
with TTL buffer
VSS
VSS
VSS
VSS
VSS
VSS
-
-
-
-
-
-
0.8V
V
V
V
V
V
V
For 4.5V ≤ VDD ≤ 5.5V
otherwise
0.15VDD
0.2VDD
0.2VDD
0.2VDD
0.3VDD
D031
D032
D033
D033
with Schmitt Trigger buffer
MCLR, GP2/T0CKI (in EXTRC mode)
OSC1 (in EXTRC mode)
OSC1 (in XT and LP)
Input High Voltage
Note 1
Note 1
I/O ports
VIH
-
-
D040
with TTL buffer
0.25VDD +
0.8V
VDD
V
4.5V ≤ VDD ≤ 5.5V
D040A
D041
D042
2.0V
-
-
-
-
VDD
VDD
VDD
VDD
VDD
400
30
V
V
V
V
V
otherwise
For entire VDD range
with Schmitt Trigger buffer
MCLR, GP2/T0CKI
0.8VDD
0.8VDD
0.7VDD
0.9VDD
30
D042A OSC1 (XT and LP)
D043
D070
Note 1
OSC1 (in EXTRC mode)
GPIO weak pull-up current (Note 4)
MCLR pull-up current
-
250
-
IPUR
-
µA VDD = 5V, VPIN = VSS
µA VDD = 5V, VPIN = VSS
-
Input Leakage Current (Notes 2, 3)
I/O ports
D060
IIL
-
-
+1
µA Vss ≤ VPIN ≤ VDD, Pin at hi-imped-
ance
D061
D063
T0CKI
OSC1
-
-
-
-
+5
+5
µA Vss ≤ VPIN ≤ VDD
µA Vss ≤ VPIN ≤ VDD, XT and LP osc
configuration
Output Low Voltage
D080
I/O ports
VOL
-
-
0.6
V
IOL = 8.5 mA, VDD = 4.5V,
–40°C to +85°C
D080A
-
-
0.6
V
IOL = 7.0 mA, VDD = 4.5V,
–40°C to +125°C
Output High Voltage
D090
I/O ports (Note 3)
VOH VDD - 0.7
VDD - 0.7
-
-
-
-
V
V
IOH = -3.0 mA, VDD = 4.5V,
–40°C to +85°C
IOH = -2.5 mA, VDD = 4.5V,
–40°C to +125°C
D090A
Capacitive Loading Specs on
Output Pins
D100
OSC2 pin
COSC
2
-
-
-
-
15
50
pF In XT and LP modes when exter-
nal clock is used to drive OSC1.
pF
D101
†
All I/O pins
CIO
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the
PIC12C5XX be driven with external clock in RC mode.
2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent
normal operating conditions. Higher leakage current may be measured at different input voltages.
3: Negative current is defined as coming out of the pin.
4: This spec. applies when GP3/MCLR is configured as MCLR. The leakage current of the MCLR circuit is higher than the
standard I/O logic.
1999 Microchip Technology Inc.
DS40139E-page 83