PIC12F683
The CMCON0 register (Register 8-1) controls the
comparator input and output multiplexers. A block
diagram of the various comparator configurations is
shown in Figure 8-3.
8.0
COMPARATOR MODULE
The comparator module contains one analog com-
parator. The inputs to the comparator are multiplexed
with I/O port pins, GP0 and GP1, while the outputs are
multiplexed to GP2. An on-chip Comparator Voltage
Reference (CVREF) can also be applied to the inputs of
the comparator.
REGISTER 8-1:
CMCON0 – COMPARATOR CONTROL REGISTER 0 (ADDRESS: 19h)
U-0
—
R-0
U-0
—
R/W-0
CINV
R/W-0
CIS
R/W-0
CM2
R/W-0
CM1
R/W-0
CM0
COUT
bit 7
bit 0
bit 7
bit 6
Unimplemented: Read as ‘0’
COUT: Comparator Output bit
When CINV = 0:
1= VIN+ > VIN-
0= VIN+ < VIN-
When CINV = 1:
1= VIN+ < VIN-
0= VIN+ > VIN-
bit 5
bit 4
Unimplemented: Read as ‘0’
CINV: Comparator Output Inversion bit
1= Output inverted
0= Output not inverted
bit 3
bit 2
CIS: Comparator Input Switch bit
When CM<2:0> = 110or 101:
1= VIN- connects to CIN+
0= VIN- connects to CIN-
CM<2:0>: Comparator Mode bits
Figure 8-3 shows the Comparator modes and CM<2:0> bit settings.
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
- n = Value at POR
2004 Microchip Technology Inc.
Preliminary
DS41211B-page 47