PIC12F683
7.2
Timer2 Interrupt
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon Reset.
FIGURE 7-1:
TIMER2 BLOCK DIAGRAM
Sets Flag
bit TMR2IF
TMR2
Output
Prescaler
Reset
EQ
TMR2
FOSC/4
1:1, 1:4, 1:16
Postscaler
1:1 to 1:16
2
Comparator
PR2
T2CKPS<1:0>
4
TOUTPS<3:0>
TABLE 7-1:
REGISTERS ASSOCIATED WITH TIMER2
Value on
all other
Resets
Value on
POR, BOD
Addr Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Bh/ INTCON GIE
8Bh
PEIE
ADIF
T0IE
INTE
—
GPIE
CMIF
T0IF
INTF
GPIF
0000 0000 0000 0000
0Ch
11h
12h
8Ch
92h
PIR1
EEIF
CCP1IF
OSFIF
TMR2IF TMR1IF 000- 0000 000- 0000
TMR2
T2CON
PIE1
Holding Register for the 8-bit TMR2 Register
0000 0000 0000 0000
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
EEIE
ADIE
CCP1IE
—
CMIE
OSFIE
TMR2IE TMR1IE 000- 0000 000- 0000
PR2
Timer2 Module Period Register
1111 1111 1111 1111
Legend:
x= unknown, u= unchanged, — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
DS41211B-page 46
Preliminary
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
