PIC10F200/202/204/206
9.7
Time-out Sequence, Power-down
and Wake-up from Sleep Status
Bits (TO, PD, GPWUF, CWUF)
The TO, PD, GPWUF and CWUF bits in the STATUS
register can be tested to determine if a Reset condition
has been caused by a power-up condition, a MCLR,
Watchdog Timer (WDT) Reset, wake-up on comparator
change or wake-up on pin change.
TABLE 9-5:
CWUF
0
0
0
0
0
0
1
TO, PD, GPWUF, CWUF STATUS AFTER RESET
GPWUF
0
0
0
0
0
1
0
TO
0
0
1
1
u
1
1
PD
0
u
0
1
u
0
0
Reset Caused By
WDT wake-up from Sleep
WDT time-out (not from Sleep)
MCLR wake-up from Sleep
Power-up
MCLR not during Sleep
Wake-up from Sleep on pin change
Wake-up from Sleep on comparator change
Legend:
u
= unchanged,
x
= unknown, – = unimplemented bit, read as ‘0’,
q
= value depends on condition.
Note 1:
The TO, PD, GPWUF and CWUF bits maintain their status (u) until a Reset occurs. A low-pulse on the
MCLR input does not change the TO, PD, GPWUF or CWUF Status bits.
9.8
Reset on Brown-out
FIGURE 9-8:
V
DD
A Brown-out Reset is a condition where device power
(V
DD
) dips below its minimum value, but not to zero,
and then recovers. The device should be reset in the
event of a brown-out.
To reset PIC10F200/202/204/206 devices when a
Brown-out Reset occurs, external brown-out protection
circuits may be built, as shown in Figure 9-7 and
BROWN-OUT
PROTECTION CIRCUIT 2
V
DD
R1
Q1
R2
MCLR
(2)
PIC10F20X
40k
(1)
FIGURE 9-7:
V
DD
BROWN-OUT
PROTECTION CIRCUIT 1
Note 1:
V
DD
This brown-out circuit is less expensive,
although less accurate. Transistor Q1 turns
off when V
DD
is below a certain level such
that:
R1
= 0.7V
V
DD
•
R1 + R2
Pin must be confirmed as MCLR.
33k
10k
Q1
MCLR
(2)
PIC10F20X
2:
40k
(1)
Note 1:
2:
This circuit will activate Reset when V
DD
goes
below Vz + 0.7V (where Vz = Zener voltage).
Pin must be confirmed as MCLR.
DS41239D-page 48
©
2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
