PIC10F200/202/204/206
9.2
9.2.1
Oscillator Configurations
OSCILLATOR TYPES
9.3
Reset
The PIC10F200/202/204/206 devices are offered with
Internal Oscillator mode only.
• INTOSC: Internal 4 MHz Oscillator
The device differentiates between various kinds of
Reset:
•
•
•
•
•
•
•
Power-on Reset (POR)
MCLR Reset during normal operation
MCLR Reset during Sleep
WDT time-out Reset during normal operation
WDT time-out Reset during Sleep
Wake-up from Sleep on pin change
Wake-up from Sleep on comparator change
9.2.2
INTERNAL 4 MHz OSCILLATOR
The internal oscillator provides a 4 MHz (nominal) system
clock (see
for
information on variation over voltage and temperature).
In addition, a calibration instruction is programmed into
the last address of memory, which contains the calibra-
tion value for the internal oscillator. This location is
always uncode protected, regardless of the code-pro-
tect settings. This value is programmed as a
MOVLW xx
instruction where
xx
is the calibration value and is
placed at the Reset vector. This will load the W register
with the calibration value upon Reset and the PC will
then roll over to the users program at address 0x000.
The user then has the option of writing the value to the
OSCCAL Register (05h) or ignoring it.
OSCCAL, when written to with the calibration value, will
“trim” the internal oscillator to remove process variation
from the oscillator frequency.
Note:
Erasing the device will also erase the pre-
programmed internal calibration value for
the internal oscillator. The calibration
value must be read prior to erasing the
part so it can be reprogrammed correctly
later.
Some registers are not reset in any way, they are
unknown on POR and unchanged in any other Reset.
Most other registers are reset to “Reset state” on
Power-on Reset (POR), MCLR, WDT or Wake-up on
pin change Reset during normal operation. They are
not affected by a WDT Reset during Sleep or MCLR
Reset during Sleep, since these Resets are viewed as
resumption of normal operation. The exceptions to this
are TO, PD, GPWUF and CWUF bits. They are set or
cleared differently in different Reset situations. These
bits are used in software to determine the nature of
Reset. See Table 9-1 for a full description of Reset
states of all registers.
TABLE 9-1:
Register
W
INDF
TMR0
PCL
STATUS
STATUS
(3)
FSR
OSCCAL
GPIO
CMCON
(3)
OPTION
TRISGPIO
Legend:
Note 1:
2:
3:
RESET CONDITIONS FOR REGISTERS – PIC10F200/202/204/206
Address
—
00h
01h
02h
03h
03h
04h
05h
06h
07h
—
—
Power-on Reset
qqqq qqqu
(1)
xxxx xxxx
xxxx xxxx
1111 1111
00-1 1xxx
00-1 1xxx
111x xxxx
1111 1110
---- xxxx
1111 1111
1111 1111
---- 1111
MCLR Reset, WDT Time-out,
Wake-up On Pin Change, Wake on
Comparator Change
qqqq qqqu
(1)
uuuu uuuu
uuuu uuuu
1111 1111
q00q quuu
(2)
qq0q quuu
(2)
111u uuuu
uuuu uuuu
---- uuuu
uuuu uuuu
1111 1111
---- 1111
u
= unchanged,
x
= unknown, – = unimplemented bit, read as ‘0’,
q
= value depends on condition.
Bits <7:2> of W register contain oscillator calibration values due to
MOVLW XX
instruction at top of memory.
See Table 9-2 for Reset value for specific conditions.
PIC10F204/206 only.
DS41239D-page 42
©
2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
