PIC10F200/202/204/206
8.1
Comparator Configuration
Note:
The comparator can have an inverted
output (see Figure 8-1).
The on-board comparator inputs, (GP0/CIN+, GP1/
CIN-), as well as the comparator output (GP2/COUT),
are steerable. The CMCON0, OPTION and TRIS
registers are used to steer these pins (see Figure 8-1).
If the Comparator mode is changed, the comparator
output level may not be valid for the specified mode
change delay shown in Table 12-1.
FIGURE 8-1:
BLOCK DIAGRAM OF THE COMPARATOR
CPREF
C+
C-
+
T0CKI/GP2/COUT
C
OUTEN
COUT(Register)
-
CNREF
CMPON
OSCCAL
Band Gap Buffer
(0.6V)
POL
T0CKI
T0CKI Pin
T0CKSEL
CWU
Q
D
CWUF
S
Read
CMCON
TABLE 8-1:
T0CS
0
1
1
1
1
TMR0 CLOCK SOURCE
FUNCTION MUXING
COUTEN
x
0
1
0
1
Source
Internal Instruction
Cycle
CMPOUT
CMPOUT
CMPOUT
T0CKI
x
0
0
1
1
CMPT0CS
DS41239D-page 38
©
2007 Microchip Technology Inc.