欢迎访问ic37.com |
会员登录 免费注册
发布采购

MCP42010-I/SL 参数 Datasheet PDF下载

MCP42010-I/SL图片预览
型号: MCP42010-I/SL
PDF下载: 下载PDF文件 查看货源
内容描述: 单/双通道数字电位SPI⑩接口 [Single/Dual Digital Potentiometer with SPI⑩ Interface]
分类和应用:
文件页数/大小: 33 页 / 682 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号MCP42010-I/SL的Datasheet PDF文件第9页浏览型号MCP42010-I/SL的Datasheet PDF文件第10页浏览型号MCP42010-I/SL的Datasheet PDF文件第11页浏览型号MCP42010-I/SL的Datasheet PDF文件第12页浏览型号MCP42010-I/SL的Datasheet PDF文件第14页浏览型号MCP42010-I/SL的Datasheet PDF文件第15页浏览型号MCP42010-I/SL的Datasheet PDF文件第16页浏览型号MCP42010-I/SL的Datasheet PDF文件第17页  
MCP41XXX/42XXX  
4.0  
APPLICATIONS INFORMATION  
The MCP41XXX/42XXX devices are 256 position  
single and dual digital potentiometers that can be used  
in place of standard mechanical pots. Resistance val-  
ues of 10 k, 50 kand 100 kare available. As  
shown in Figure 4-1, each potentiometer is made up of  
a variable resistor and an 8-bit (256 position) data reg-  
ister that determines the wiper position. There is a  
nominal wiper resistance of 52for the 10 kversion,  
125for the 50 kand 100 kversions. For the dual  
devices, the channel-to-channel matching variation is  
less than 1%. The resistance between the wiper and  
either of the resistor endpoints varies linearly according  
to the value stored in the data register. Code 00h  
effectively connects the wiper to the B terminal. At  
power-up, all data registers will automatically be loaded  
with the mid-scale value (80h). The serial interface pro-  
vides the means for loading data into the shift register,  
which is then transferred to the data registers. The  
serial interface also provides the means to place indi-  
vidual potentiometers in the shutdown mode for maxi-  
mum power savings. The SHDN pin can also be used  
to put all potentiometers in shutdown mode and the RS  
pin is provided to set all potentiometers to mid-scale  
(80h).  
PW0  
PW1  
PA0  
PB0 PA1  
PB1  
D0  
RDAC2  
RDAC1  
Data Register 0  
D7  
Data Register 1  
D7  
D0  
RS  
CS  
Decode  
Logic  
D7  
D0  
16-bit Shift Register  
SCK  
SI  
SO  
SHDN  
FIGURE 4-1:  
Block diagram showing the MCP42XXX dual digital potentiometer. Data register 0 and  
data register 1 are 8-bit registers allowing 256 positions for each wiper. Standard SPI pins are used with  
the addition of the Shutdown (SHDN) and Reset (RS) pins. As shown, reset affects the data register and  
wipers, bringing them to mid-scale. Shutdown disconnects the A terminal and connects the wiper to B,  
without changing the state of the data registers.  
When laying out the circuit for your digital potentiome-  
VDD  
ter, bypass capacitors should be used. These capaci-  
tors should be placed as close as possible to the device  
pin. A bypass capacitor value of 0.1 µF is recom-  
mended. Digital and analog traces should be separated  
as much as possible on the board, with no traces run-  
ning underneath the device or the bypass capacitor.  
Extra precautions should be taken to keep traces with  
high-frequency signals (such as clock lines) as far as  
possible from analog traces. Use of an analog ground  
plane is recommended in order to keep the ground  
potential the same for all devices on the board.  
VDD  
0.1 uF  
0.1 uF  
B
W
A
µC  
Data Lines  
To Application  
Circuit  
2003 Microchip Technology Inc.  
DS11195C-page 13  
 
 复制成功!