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KSZ8721BL 参数 Datasheet PDF下载

KSZ8721BL图片预览
型号: KSZ8721BL
PDF下载: 下载PDF文件 查看货源
内容描述: [DATACOM, ETHERNET TRANSCEIVER, PQFP48]
分类和应用: 以太网:16GBASE-T电信电信集成电路
文件页数/大小: 35 页 / 311 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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Micrel, Inc.
KS8721BL/SL
Strapping Options
(1)
Pin Number
6, 5,
4, 3
25
9
(3)
11
(3)
21
(3)
22
(3)
27
Pin Name
PHYAD[4:1]/
RXD[0:3]
PHYAD0/
INT#
PCS_LPBK/
RXDV
ISO/RXER
RMII/COL
RMII_BTB
CRS
SPD100/
No FEF/
Type
(2)
Ipd/O
Ipu/O
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipu/O
Enables PCS_LPBK mode at power-up/reset. PD (default) = Disable, PU = Enable.
Enables ISOLATE mode at power-up/reset. PD (default) = Disable, PU = Enable.
Enables RMII mode at power-up/reset. PD (default) = Disable, PU = Enable.
Enable RMII back-to-back mode at power-up/reset. PD (default) = Disable,
PU = Enable.
Latched into Register 0h bit 13 during power-up/reset. PD = 10Mbps, PU (default) =
100Mbps. If SPD100 is asserted during power-up/reset, this pin is also latched as
LED1 the Speed Support in register 4h. (If FXEN is pulled up, the latched value 0
means no Far_End _Fault.)
Latched into Register 0h bit 8 during power-up/reset. PD = Half-duplex, PU (default) =
Full-duplex. If Duplex is pulled up during reset, this pin is also latched as the Duplex
support in register 4h.
Nway (auto-negotiation) Enable. Latched into Register 0h bit 12 during power-up/reset.
PD = Disable Auto-Negotiation, PU (default) = Enable Auto-Negotiation.
Power-Down Enable. PU (default) = Normal operation, PD = Power-Down mode.
Pin Function
PHY Address latched at power-up/reset. The default PHY address is 00001.
28
DUPLEX/
LED2
NWAYEN/
LED3
PD#
Ipu/O
29
30
Notes:
1.
2.
Ipu/O
Ipu
Strap-in is latched during power-up or reset.
Ipu = Input with internal pull-up.
Ipd/O = Input with internal pull-down during reset; output pin otherwise.
Ipu/O = Input with internal pull-up during reset; output pin otherwise.
See “Reference Circuit” section for pull-up/pull-down and
float
information.
3.
Some devices may drive MII pins that are designated as output (PHY) on power-up, resulting in incorrect strapping values latched at reset.
It is recommended that an external pull-down via 1kΩ resistor be used in these applications to augment the 8721’s internal pull-down.
June 2009
10
M9999-062509-1.3