ENC28J60
REGISTER 12-2: EIE: ETHERNET INTERRUPT ENABLE REGISTER
R/W-0
INTIE
R/W-0
PKTIE
R/W-0
R/W-0
R/W-0
TXIE
R/W-0
r
R/W-0
R/W-0
DMAIE
LINKIE
TXERIE
RXERIE
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7
bit 6
bit 5
bit 4
bit 3
INTIE: Global INT Interrupt Enable bit
1= Allow interrupt events to drive the INT pin
0= Disable all INT pin activity (pin is continuously driven high)
PKTIE: Receive Packet Pending Interrupt Enable bit
1= Enable receive packet pending interrupt
0= Disable receive packet pending interrupt
DMAIE: DMA Interrupt Enable bit
1= Enable DMA interrupt
0= Disable DMA interrupt
LINKIE: Link Status Change Interrupt Enable bit
1= Enable link change interrupt from the PHY
0= Disable link change interrupt
TXIE: Transmit Enable bit
1= Enable transmit interrupt
0= Disable transmit interrupt
bit 2
bit 1
Reserved: Maintain as ‘0’
TXERIE: Transmit Error Interrupt Enable bit
1= Enable transmit error interrupt
0= Disable transmit error interrupt
bit 0
RXERIE: Receive Error Interrupt Enable bit
1= Enable receive error interrupt
0= Disable receive error interrupt
© 2006 Microchip Technology Inc.
Preliminary
DS39662B-page 65
MICROCHIP [ MICROCHIP ]
